PCF2123TS datasheet(38/55 Pages) NXP

38 / 55 page

PCF2123_2

Product data sheet

Rev. 02 — 4 December 2009

38 of 55

NXP Semiconductors

PCF2123

SPI Real time clock/calendar

[1]

For reliable oscillator start at power-on: VDD =VDD(min) + 0.3 V.

[2]

Timer source clock = 1

⁄

60 Hz, level of pins CE, SDI and SCL is VDD or VSS.

[3]

Implicit by design.

[4]

Refers to external pull-up voltage.

[5]

Integrated load capacitance, CL(itg), is a calculation of COSCI and COSCO in series.

leakage current

VI =VDD or VSS on pins SDI,

SCL, OSCI, CLKOE, CLKOUT

−10

µA

VI =VSS on pin CE

−10

µA

Rpd

pull-down resistance

on pin CE

240

550

Ω

input capacitance

on pins SDI, SCL, CLKOE and

[3] --7

Outputs

output voltage

on pins CLKOUT and INT

[4]

−0.5

+5.5

on pin OSCO

−0.5

+5.5

on pin SDO

−0.5

VDD + 0.5

VOH

HIGH-level output voltage

on pin SDO

0.8VDD

-VDD

VOL

LOW-level output voltage

on pin SDO

VSS

0.2VDD

on pins CLKOUT and INT;

VDD =5V;

IOL = 1.5 mA

VSS

0.4

IOH

HIGH-level output current

output source current;

VOH = 4.6 V;

VDD = 5 V on pin SDO

1.5

IOL

LOW-level output current

output sink current;

VOL = 0.4 V;

VDD = 5 V on pins INT, SDO

and CLKOUT

1.5

ILO

output leakage current

VO =VDD or VSS

−10

µA

CL(itg)

integrated load

capacitance

on pins OSCO and OSCI

[5] 3.3

series resistance

100

Ω

Table 44.

Static characteristics …continued

VDD = 1.1 V to 5.5 V; VSS =0V; Tamb = −40 °C to +85 °C; fosc = 32.768 kHz; quartz Rs =15kΩ; CL = 7 pF; unless otherwise

speciﬁed.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Litg

()

OSCI

OSCO

⋅

()

OSCI

OSCO

()

--------------------------------------------

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