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PCF2123TS датащи(PDF) 19 Page - NXP Semiconductors

номер детали PCF2123TS
подробное описание детали  SPI Real time clock/calendar
PDF  55 Pages
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производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
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PCF2123TS датащи(HTML) 19 Page - NXP Semiconductors

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PCF2123_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 4 December 2009
19 of 55
NXP Semiconductors
PCF2123
SPI Real time clock/calendar
Figure 14, Table 22 and Table 23 show an example for clearing bit AF, but leaving bit MSF
and bit TF unaffected. The flags are cleared by a write command, therefore bits 7, 6, 4, 1
and 0 must be written with their previous values. Repeatedly re-writing these bits has no
influence on the functional behavior.
To prevent the timer flags being overwritten while clearing bit AF, logic AND is performed
during a write access. A flag is cleared by writing logic 0 whilst a flag is not cleared by
writing logic 1. Writing logic 1 will result in the flag value remaining unchanged.
Table 23 shows what instruction must be sent to clear bit AF. In this example, bit MSF and
bit TF are unaffected.
9.8 Timer functions
The countdown timer has four selectable source clocks allowing for countdown periods in
the range from 244
µs to 4 h 15 min. There are also two pre-defined timers which can be
used to generate an interrupt once per second or once per minute. For periods greater
than 4 hours, the alarm function can be used. Registers 01h, 0Eh and 0Fh are used to
control the timer function and output.
9.8.1 Register Timer_clkout
[1]
Values of COF[2:0] see Table 35.
[2]
Default value.
Table 22.
Flag location in register Control_2
Register
Bit
7
6
5
4
3
2
1
0
Control_2
-
-
MSF
-
AF
TF
-
-
Table 23.
Example to clear only AF (bit 3) in register Control_2
Register
Bit
7
6
5
4
3
2
1
0
Control_2
-
-
1
-
0
1
-
-
Table 24.
Timer_clkout - timer control register (address 0Eh) bit description
Bit
Symbol
Value
Description
Reference
7
-
-
unused
-
6 to 4 COF[2:0]
[1]
CLKOUT control
Section 9.10
3
TE
0
countdown timer is disabled
Section 9.8.4
1
countdown timer is enabled
2
-
-
unused
1 to 0 CTD[1:0]
00
4.096 kHz countdown timer source clock
01
64 Hz countdown timer source clock
10
1 Hz countdown timer source clock
11[2]
1
⁄60 Hz countdown timer source clock



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