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PCF2123TS датащи(PDF) 26 Page - NXP Semiconductors |
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PCF2123TS датащи(HTML) 26 Page - NXP Semiconductors |
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26 / 55 page ![]() PCF2123_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 4 December 2009 26 of 55 NXP Semiconductors PCF2123 SPI Real time clock/calendar The timing shown for clearing bit TF in Figure 19 is also valid for the non-pulsed interrupt mode, i.e., when bit TI_TP = 0; INT may be shortened by setting bit TIE to logic 0. 9.9.3 Alarm interrupts The generation of interrupts from the alarm function is controlled via bit AIE (see Table 6). If bit AIE is enabled, the INT pin follows the condition of bit AF. Clearing bit AF will immediately clear INT. No pulse generation is possible for alarm interrupts (see Figure 20). 9.9.3.1 Correction pulse interrupts Interrupt pulses generated by correction events can be shortened by writing logic 1 to bit CIE in register Control_1. (1) Indicates normal duration of INT pulse (bit TI_TP = 1). Fig 19. Example of shortening the INT pulse by clearing the TF flag 001aaf909 01 countdown counter CDTF INT SCL instruction n CLEAR INSTRUCTION 8th clock (1) Example where only the minute alarm is used and no other interrupts are enabled. Fig 20. AF timing 001aaf910 44 45 minute counter minute alarm AF INT SCL instruction 45 CLEAR INSTRUCTION 8th clock |
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