ADS5400IPZP datasheet(40/48 Pages) TI

40 / 48 page

ADS5400

SLAS611B – OCT 2009 – REVISED MARCH 2010

www.ti.com

Layout Information

The evaluation board provides a guideline of how to lay out the board to obtain the maximum performance from

the ADS5400. General design rules, such as the use of multilayer boards, single ground plane for ADC ground

connections, and local decoupling ceramic chip capacitors, should be applied. The input traces should be

isolated from any external source of interference or noise, including the digital outputs as well as the clock

traces. The clock signal traces should also be isolated from other signals, especially in applications where low

jitter is required like high IF sampling. Besides performance-oriented rules, care must be taken when considering

the heat dissipation of the device. The thermal heat sink should be soldered to the board as described in the

PowerPad Package section. See ADS5400 EVM User Guide (SLAU293) on the TI Web site for the evaluation

board schematic.

PowerPAD™ Package

The PowerPAD package is a thermally enhanced standard-size IC package designed to eliminate the use of

bulky heatsinks and slugs traditionally used in thermal packages. This package can be mounted using standard

printed circuit board (PCB) assembly techniques, and can be removed or replaced using standard repair

procedures.

The PowerPAD package is designed so that the leadframe die pad (or thermal pad) is exposed on the bottom of

the IC. This provides an extremely low thermal resistance path between the die and the exterior of the package.

The thermal pad on the bottom of the IC can then be soldered directly to the printed circuit board (PCB), using

the PCB as a heatsink.

Assembly Process

1. Prepare the PCB top-side etch pattern including etch for the leads as well as the thermal pad as illustrated in

the Mechanical Data section.

2. It is recommended to place a 9 x 9 array of 13-mil-diameter (0.33mm) via holes under the package, with the

middle 5 x 5 array of thermal vias exposed.

3. Connect all holes (both those inside and outside the thermal pad area) to an internal copper plane (such as a

ground plane).

4. Do not use the typical web or spoke via-connection pattern when connecting the thermal vias to the ground

plane. The spoke pattern increases the thermal resistance to the ground plane.

5. The top-side solder mask should leave exposed the terminals of the package and the 5 x 5 via array thermal

pad area (6 mm x 6 mm).

6. Cover the entire bottom side of the PowerPAD vias to prevent solder wicking.

7. Apply solder paste to the exposed thermal pad area and all of the package terminals.

For more detailed information regarding the PowerPAD package and its thermal properties, see either the

PowerPAD Made Easy application brief (SLMA004) or the PowerPAD Thermally Enhanced Package application

report (SLMA002).

Product Folder Link(s): ADS5400

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