поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

Preview PDF HTML

XIO2001 датащи(PDF) 101 Page - Texas Instruments

Click here to check the latest version.
номер детали XIO2001
подробное описание детали  PCI Express??to PCI Bus Translation Bridge
PDF  128 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
Logo TI - Texas Instruments

XIO2001 датащи(HTML) 101 Page - Texas Instruments

Back Button XIO2001 Datasheet HTML 97Page - Texas Instruments XIO2001 Datasheet HTML 98Page - Texas Instruments XIO2001 Datasheet HTML 99Page - Texas Instruments XIO2001 Datasheet HTML 100Page - Texas Instruments XIO2001 Datasheet HTML 101Page - Texas Instruments XIO2001 Datasheet HTML 102Page - Texas Instruments XIO2001 Datasheet HTML 103Page - Texas Instruments XIO2001 Datasheet HTML 104Page - Texas Instruments XIO2001 Datasheet HTML 105Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 101 / 128 page
background image
XIO2001
www.ti.com
SCPS212D – MAY 2009 – REVISED JANUARY 2010
5.13 Secondary Error Capabilities and Control Register
The secondary error capabilities and control register allows the system to monitor and control the
secondary advanced error reporting capabilities. See Table 5-11 for a complete description of the register
contents.
PCI Express extended register offset: 138h
Register type:
Read-only
Default value:
0000 0000h
BIT NUMBER
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
RESET STATE
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
BIT NUMBER
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RESET STATE
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Table 5-11. Secondary Error Capabilities and Control Register Description
BIT
FIELD NAME
ACCESS
DESCRIPTION
31:5
RSVD
R
Reserved. Return 000 0000 0000 0000 0000 0000 0000b when read.
4:0(1)
SEC_FIRST_ERR
RU
First error pointer. This 5-bit value reflects the bit position within the secondary
uncorrectable error status register (offset 12Ch, see Section 5.10) corresponding to the
class of the first error condition that was detected.
(1)
These bits are reset by a PCI Express reset (PERST), a GRST, or the internally-generated power-on reset.
Copyright © 2009–2010, Texas Instruments Incorporated
PCI Express Extended Configuration Space
101
Submit Documentation Feedback
Product Folder Link(s): XIO2001



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com