поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

UPSD3233 датащи(PDF) 155 Page - STMicroelectronics

номер детали UPSD3233
подробное описание детали  Flash Programmable System Devices with 8032 Microcontroller Core
PDF  170 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

UPSD3233 датащи(HTML) 155 Page - STMicroelectronics

Back Button UPSD3233 Datasheet HTML 151Page - STMicroelectronics UPSD3233 Datasheet HTML 152Page - STMicroelectronics UPSD3233 Datasheet HTML 153Page - STMicroelectronics UPSD3233 Datasheet HTML 154Page - STMicroelectronics UPSD3233 Datasheet HTML 155Page - STMicroelectronics UPSD3233 Datasheet HTML 156Page - STMicroelectronics UPSD3233 Datasheet HTML 157Page - STMicroelectronics UPSD3233 Datasheet HTML 158Page - STMicroelectronics UPSD3233 Datasheet HTML 159Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 155 / 170 page
background image
155/170
uPSD3234A, uPSD3234BV, uPSD3233B, uPSD3233BV
Table 130. CPLD Macrocell Asynchronous Clock Mode Timing (5V Devices)
Table 131. CPLD Macrocell Asynchronous Clock Mode Timing (3V Devices)
Symbol
Parameter
Conditions
Min
Max
PT
Aloc
Turbo
Off
Slew
Rate
Unit
fMAXA
Maximum Frequency
External Feedback
1/(tSA+tCOA)
38.4
MHz
Maximum Frequency
Internal Feedback (fCNTA)
1/(tSA+tCOA–10)
62.5
MHz
Maximum Frequency
Pipelined Data
1/(tCHA+tCLA)
71.4
MHz
tSA
Input Setup Time
7
+ 2
+ 10
ns
tHA
Input Hold Time
8
ns
tCHA
Clock Input High Time
9
+ 10
ns
tCLA
Clock Input Low Time
9
+ 10
ns
tCOA
Clock to Output Delay
21
+ 10
– 2
ns
tARDA
CPLD Array Delay
Any macrocell
11
+ 2
ns
tMINA
Minimum Clock Period
1/fCNTA
16
ns
Symbol
Parameter
Conditions
Min
Max
PT
Aloc
Turbo
Off
Slew
Rate
Unit
fMAXA
Maximum Frequency
External Feedback
1/(tSA+tCOA)
21.7
MHz
Maximum Frequency
Internal Feedback (fCNTA)
1/(tSA+tCOA–10)
27.8
MHz
Maximum Frequency
Pipelined Data
1/(tCHA+tCLA)
33.3
MHz
tSA
Input Setup Time
10
+ 4
+ 20
ns
tHA
Input Hold Time
12
ns
tCHA
Clock High Time
17
+ 20
ns
tCLA
Clock Low Time
13
+ 20
ns
tCOA
Clock to Output Delay
36
+ 20
– 6
ns
tARD
CPLD Array Delay
Any macrocell
25
+ 4
ns
tMINA
Minimum Clock Period
1/fCNTA
36
ns



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com