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UPSD3233 датащи(PDF) 135 Page - STMicroelectronics |
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UPSD3233 датащи(HTML) 135 Page - STMicroelectronics |
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135 / 170 page ![]() 135/170 uPSD3234A, uPSD3234BV, uPSD3233B, uPSD3233BV AC/DC PARAMETERS These tables describe the AD and DC parameters of the uPSD323X Devices: ➜ DC Electrical Specification ➜ AC Timing Specification ■ PLD Timing – Combinatorial Timing – Synchronous Clock Mode – Asynchronous Clock Mode – Input Macrocell Timing ■ MCU Module Timing – READ Timing –WRITE Timing – Power-down and RESET Timing The following are issues concerning the parame- ters presented: – In the DC specification the supply current is given for different modes of operation. – The AC power component gives the PLD, Flash memory, and SRAM mA/MHz specification. Figures 72 and 73 show the PLD mA/MHz as a function of the number of Product Terms (PT) used. – In the PLD timing parameters, add the required delay when Turbo Bit is '0.' Figure 72. PLD ICC /Frequency Consumption (5V range) Figure 73. PLD ICC /Frequency Consumption (3V range) 0 10 20 30 40 60 70 80 90 100 110 VCC = 5V 50 010 15 5 20 25 HIGHEST COMPOSITE FREQUENCY AT PLD INPUTS (MHz) TUR BO ON (100% ) TURBO ON (25%) TURBO OFF PT 100% PT 25% AI02894 0 10 20 30 40 50 60 VCC = 3V 010 15 5 20 25 TURBO ON (100%) TURB O ON (25% ) TU RB O O FF HIGHEST COMPOSITE FREQUENCY AT PLD INPUTS (MHz) PT 100% PT 25% AI03100 |
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