7477 datasheet(15/354 Pages) RENESAS

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List of figures

7470/7471/7477/7478 GROUP USER’S MANUAL

Fig. 1.20.14 IOH-VOH characteristics of programmable I/O port (CMOS output) P-channel

side (7477/7478 group) ......................................................................................... 1-210

Fig. 1.20.15 IOL-VOL characteristics of programmable I/O port (CMOS) N-channel side

(7477/7478 group) .................................................................................................. 1-210

Fig. 1.20.16 IIL-VIL characteristics of programmable I/O port (CMOS output) pull-up

transistor (7477/7478 group) ................................................................................ 1-211

Fig. 1.20.17 A-D conversion standard characteristics, relative precision error (1) ........... 1-212

Fig. 1.20.18 A-D conversion standard characteristics, relative precision error (2) ........... 1-213

Fig. 1.20.19 A-D conversion standard characteristics, absolute precision error (1) ......... 1-214

Fig. 1.20.20 A-D conversion standard characteristics, absolute precision error (2) ......... 1-215

Fig. 1.20.21 A-D conversion standard characteristics, absolute precision error (3) ......... 1-216

Fig. 1.20.22 A-D conversion standard characteristics, absolute precision error (4) ......... 1-217

Fig. 1.20.23 A-D conversion standard characteristics, absolute precision error (5) ......... 1-218

CHAPTER 2. APPLICATION

Fig. 2.1.1 Example of port direction register setting ................................................................... 2-3

Fig. 2.1.2 Example of external circuit design for I/O port ........................................................ 2-6

Fig. 2.2.1 Memory map of interrupt related registers ................................................................ 2-7

Fig. 2.2.2 Structure of Processor status register ........................................................................ 2-8

Fig. 2.3.1 Memory map of timer related registers .................................................................... 2-10

Fig. 2.3.2 Example of control procedure [Clock function] ....................................................... 2-13

Fig. 2.3.3 Example of measurement method of frequency ..................................................... 2-14

Fig. 2.3.4 Example of control procedure [Frequency measurement] ..................................... 2-15

Fig. 2.3.5 Example of a peripheral circuit [Pulse output mode] ............................................. 2-16

Fig. 2.3.6 Connection of timer and setting of division ratio ................................................... 2-16

Fig. 2.3.7 Example of control procedure [Piezoelectric buzzer output] ................................. 2-17

Fig. 2.3.8 Example of peripheral circuit [Pulse width measurement mode] ......................... 2-18

Fig. 2.3.9 Example of control procedure [Pulse width measurement mode] ........................ 2-19

Fig. 2.3.10 Example of peripheral circuit [PWM mode] ........................................................... 2-20

Fig. 2.3.11 Example of control procedure [PWM mode] ......................................................... 2-21

Fig. 2.3.12 Timing at which timer value and read value change in the case where two

timers are connected in series .................................................................................2-22

Fig. 2.4.1 Memory map of serial I/O related registers of 7470/7471 group ......................... 2-23

Fig. 2.4.2 Example of connections [Clock synchronous serial I/O mode, 7470/7471

group] ............................................................................................................................ 2-24

Fig. 2.4.3 Example of control procedure [Clock synchronous serial I/O mode, 7470/7471

group] ............................................................................................................................ 2-25

Fig. 2.4.4 Example of connections [Byte specification mode, 7470/7471 group] ................ 2-26

Fig. 2.4.5 Example of control procedure (1) [Byte specification mode, 7470/7471 group] 2-27

Fig. 2.4.6 Example of control procedure (2) [Byte specification mode, 7470/7471 group] 2-28

Fig. 2.4.7 Memory map of serial I/O related registers in 7477/7478 group ......................... 2-29

Fig. 2.4.8 Example of connections [Clock synchronous serial I/O mode, 7477/7478

group] ............................................................................................................................. 2-30

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