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7470/7471/7477/7478 GROUP USER’S MANUAL

HARDWARE

1.10 I/O pins

1-35

1.10 I/O pins

The 7470/7471/7477/7478 group is provided with the following I/O pins.

q I/O port (P0 to P5)

______________

q Reset input (RESET)

q Clock input/output (XIN, XOUT, XCIN, XCOUT)

q A-D convesion reference voltage input (VREF)

q Power supply voltage input (VCC, VSS, AVSS)

Notes 1: The 7470/7477 group is not provided with port P5 and pins XCIN and XCOUT.

2: The AVSS pin is dedicated to the 56P6N-A package product.

For an outline of each pin, refer to “1.5 Pin description.”

1.10.1. I/O port

(1) I/O port writing and reading

2 The input-only pin and the programmable I/O port set as input port

The values (pin states) which input to the input-only pin and to the programmable I/O port set as

input port can be read in by reading the Port register corresponding to each port.

When data is written into the Port register corresponding to each port, it can be only written in the

Port register and has no effect on the pin state.

2 The programmable I/O port set as an output port

The value written into the Port register corresponding to the programmable I/O port set as an

output port is output to the outside by way of a transistor.

When the Port register corresponding to each port has been read, each pin state is not read in

but the value written into the Port register is read. Accordingly, if the output “H” voltage has been

reduced or the output “L” voltage has been increased by an external load, the previous output

value can be correctly read.

Figure 1.10.1 shows the I/O port writing and reading and Table 1.10.1 shows the port register

address allocation.

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