7721 datasheet(12/577 Pages) RENESAS

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7721 Group User’s Manual

Table of contents

CHAPTER 12 A-D CONVERTER

12.1 Overview ............................................................................................................................. 12-2

12.2 Block description .............................................................................................................. 12-3

12.2.1 A-D control register ................................................................................................... 12-4

12.2.2 A-D sweep pin select register ................................................................................. 12-6

12.2.3 A-D register i (i = 0 to 7) ......................................................................................... 12-7

12.2.4 A-D conversion interrupt control register ................................................................ 12-8

12.2.5 Port P7 direction register ......................................................................................... 12-9

12.3 A-D conversion method ................................................................................................. 12-10

12.4 Absolute accuracy and differential non-linearity error .......................................... 12-12

12.4.1 Absolute accuracy ................................................................................................... 12-12

12.4.2 Differential non-linearity error ................................................................................. 12-13

12.5 One-shot mode ................................................................................................................ 12-14

12.5.1 Settings for one-shot mode .................................................................................... 12-14

12.5.2 One-shot mode operation description ................................................................... 12-16

12.6 Repeat mode .................................................................................................................... 12-17

12.6.1 Settings for repeat mode ........................................................................................ 12-17

12.6.2 Repeat mode operation description ...................................................................... 12-19

12.7 Single sweep mode ........................................................................................................ 12-20

12.7.1 Settings for single sweep mode ............................................................................ 12-20

12.7.2 Single sweep mode operation description ............................................................ 12-22

12.8 Repeat sweep mode ....................................................................................................... 12-24

12.8.1 Settings for repeat sweep mode ........................................................................... 12-24

12.8.2 Repeat sweep mode operation description .......................................................... 12-26

12.9 Precautions for A-D converter ..................................................................................... 12-28

CHAPTER 13 DMA CONTROLLER

13.1 Overview ............................................................................................................................. 13-2

13.1.1 Performance overview ............................................................................................... 13-2

13.1.2 Bus use priority levels .............................................................................................. 13-3

13.1.3 Modes .......................................................................................................................... 13-3

13.2 Block description .............................................................................................................. 13-6

13.2.1 Bus access control circuit ........................................................................................ 13-7

13.2.2 DMAC control register L ......................................................................................... 13-10

13.2.3 DMAC control register H ........................................................................................ 13-11

13.2.4 Source address register i (SARi) .......................................................................... 13-12

13.2.5 Destination address register i (DARi) ................................................................... 13-12

13.2.6 Transfer counter register i (TCRi) ......................................................................... 13-12

13.2.7 Incrementer/Decrementer ........................................................................................ 13-13

13.2.8 Decrementer ............................................................................................................. 13-13

13.2.9 DMA latch ................................................................................................................. 13-13

13.2.10 DMAi mode register L ........................................................................................... 13-14

13.2.11 DMAi mode register H .......................................................................................... 13-15

13.2.12 DMAi control register ............................................................................................ 13-16

13.2.13 DMAi interrupt control register ............................................................................. 13-17

13.2.14 Port P9 direction register ..................................................................................... 13-18

[Precautions for DMAC] ...................................................................................................... 13-18

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