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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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7721 датащи(PDF) 60 Page - Renesas Technology Corp |
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7721 датащи(HTML) 60 Page - Renesas Technology Corp |
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60 / 577 page  CONNECTION WITH EXTERNAL DEVICES 7721 Group User’s Manual 3–13 3.4 Hold function Fig. 3.4.1 Timing of acceptance of Hold request and termination of Hold state (1) R/W HOLD ALE Floating ST0 E Address B Address A Bus request (Hold) ST1 Bus request sampling Transfer of right to use bus <When inputting “L” level to HOLD pin while bus is unused> q State when inputting “L” level to HOLD pin External data bus Data length External data bus width 16 8, 16 Unused 8, 16 8 Clock 1 (Note 1) External address bus BLE, BHE External address bus / External data bus Bus not in use Hold state Bus in use This is the period in which the bus is not used, so that not a new address but the address which was output immediately before is output again. Notes 1: Clock 1 has the same polarity and the same frequency as . Timing of signals to be input from or output to the external is ordained on the basis of clock 1. 2: Bus request (Hold) and bus request sampling are internal signals. Floating Floating (Note 2) (Note 2) Transfer of right to use bus |
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