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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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7721 датащи(PDF) 41 Page - Renesas Technology Corp |
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7721 датащи(HTML) 41 Page - Renesas Technology Corp |
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41 / 577 page  7721 Group User’s Manual CENTRAL PROCESSING UNIT (CPU) 2–18 2.4.2 External area Table 2.4.1 lists the external area. When connecting the external device, follow the procedure described bellow: •Connect the ROM to addresses FFCE16 to FFFF16 because they are interrupt vector table. •Stack area can be assigned to bank 016 or bank FF16. Select the stack area by the stack bank select bit (bit 7 at address 5E16). (Refer to “Figure 2.4.4.”) •When using the DRAM controller, DRAM area can be selected from address FFFFFF16 toward the low- order address in a unit of 1 Mbytes. (Refer to “CHAPTER 14. DRAM CONTROLLER.”) In the case connecting an external device to the area where overlaps the internal area, when reading out the overlapping area, the central processing unit (CPU) take in data of the internal area and do not take in data of the external area. When writing to the overlapping area, data is written to the internal area. The signal is output to the external at the same timing when data is written to the internal area. Table 2.4.1 External area 2.4 Memory assignment 0 M37721S2BFP Type name Internal RAM area select bit External area M37721S1BFP “0” (Fix this bit to “0.”) 216–916 28016–1FBF16 200016–FFFFFF16 1 216–916 48016–1FBF16 200016–FFFFFF16 Internal RAM area select bit : bit 1 at address 5F16 |
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