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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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7721 датащи(PDF) 94 Page - Renesas Technology Corp |
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7721 датащи(HTML) 94 Page - Renesas Technology Corp |
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94 / 577 page  7721 Group User’s Manual 6–5 INPUT/OUTPUT PINS Figures 6.2.4 and 6.2.5 show the port peripheral circuits. 6.2 Programmable I/O ports Fig. 6.2.4 Port peripheral circuits (1) Ports P43 to P46 [Inside dotted-line not included] Data bus Direction register Port latch Ports P83/TxD0, P87/TxD1, [Inside dotted-line not included] Ports P50/TA2OUT, P52/TA3OUT, P54/TA4OUT [Inside dotted-line included] Data bus “1” Output Port latch Direction register P82/RxD0, P86/RxD1, Ports P47, P51/TA2 IN, P53/TA3IN, P55/TA4IN, P56/TB0IN, P57/TB1IN, [Inside dotted-line included] (There is no hysteresis for P82/RxD0 and P86/RxD1.) Ports P60/RTP00 to P67/RTP13 Data bus Direction register Port latch P91/DMAREQ0, P93/DMAREQ1, P95/DMAREQ2, P97/DMAREQ3, P100/INT0, P101/INT1, P102/INT2, P90/DMAACK0, P92/DMAACK1, P94/DMAACK2, P96/DMAACK3, P104/CAS, P105/RAS, P106/MA8, P107/MA9 (internal peripheral device) Latch TQ CK Timer underflow signal |
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