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7721 датащи(PDF) 75 Page - Renesas Technology Corp |
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7721 датащи(HTML) 75 Page - Renesas Technology Corp |
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75 / 577 page ![]() RESET 7721 Group User’s Manual 4–12 ______ 4.1.4 Time supplying “L” level to RESET pin ______ Time supplying “L” level to the RESET pin varies according to the state of the clock oscillation circuit. qWhen the oscillator is stably oscillating or a stable clock is input from the XIN pin, supply “L” level for 2 µs or more. qWhen the oscillator is not stably oscillating (including the case at power-on reset or in Stop mode), supply “L” level until the oscillation is stabilized. The time required for stabilizing oscillation varies according to the oscillator. For details, contact the oscillator manufacturer. Figure 4.1.11 shows the power-on reset conditions. Figure 4.1.12 shows an example of a power-on reset circuit. V For details about Stop mode, refer to section “5.3 Stop mode.” For details about clocks, refer to “CHAPTER 5. CLOCK GENERATING CIRCUIT.” 4.1 Hardware reset Fig. 4.1.11 Power-on reset conditions Fig. 4.1.12 Example of power-on reset circuit 0V 0V Vcc RESET Powered on here 4.5V 0.9V 1 IN OUT GND Delay capacity RESET Vcc Vss 47 SW Cd GND 3 25 5 V M51957AL M37721 27 k 10 k 4 V The delay time is about 11 ms when Cd = 0.033 µF. td ≈ 0.34 ! Cd [ µs], Cd: [ pF ] Vcc |
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