SH7021 datasheet(21/509 Pages) RENESAS

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A.2.45 Refresh Timer Counter Register (RTCNT).......................................................... 558

A.2.46 Refresh Timer Constant Register (RTCOR) ........................................................ 559

A.2.47 Timer Control/Status Register (TCSR) ................................................................ 559

A.2.48 Timer Counter (TCNT) ........................................................................................ 561

A.2.49 Reset Control/Status Register (RSTCSR) ............................................................ 561

A.2.50 Standby Control Register (SBYCR) .................................................................... 562

A.2.51 Port A Data Register (PADR) .............................................................................. 563

A.2.52 Port B Data Register (PBDR)............................................................................... 564

A.2.53 Port A I/O Register (PAIOR) ............................................................................... 565

A.2.54 Port B Data Register (PBIOR) ............................................................................. 566

A.2.55 Port A Control Register 1 (PACR1) ..................................................................... 567

A.2.56 Port A Control Register 2 (PACR2) ..................................................................... 569

A.2.57 Port B Control Register 1 (PBCR1) ..................................................................... 571

A.2.58 Port B Control Register 2 (PBCR2) ..................................................................... 573

A.2.59 Column Address Strobe Pin Control Register (CASCR) ..................................... 575

A.2.60 TPC Output Mode Register (TPMR) ................................................................... 576

A.2.61 TPC Output Control Register (TPCR) ................................................................. 577

A.2.62 Next Data Enable Register A (NDERA).............................................................. 579

A.2.63 Next Data Enable Register B (NDERB) .............................................................. 579

A.2.64 Next Data Register A (NDRA) (When the output triggers of TPC output

groups 0 and 1 are the same) ................................................................................ 580

A.2.65 Next Data Register A (NDRA) (When the output triggers of TPC output

groups 0 and 1 are the same) ................................................................................ 581

A.2.66 Next Data Register A (NDRA) (When the output triggers of TPC output

groups 0 and 1 are different) ................................................................................ 581

A.2.67 Next Data Register A (NDRA) (When the output triggers of TPC output

groups 0 and 1 are different) ................................................................................ 582

A.2.68 Next Data Register B (NDRB) (When the output triggers of TPC output

groups 2 and 3 are the same) ................................................................................ 582

A.2.69 Next Data Register B (NDRB) (When the output triggers of TPC output

groups 2 and 3 are the same) ................................................................................ 583

A.2.70 Next Data Register B (NDRB) (When the output triggers of TPC output

groups 2 and 3 are different) ................................................................................ 584

A.2.71 Next Data Register B (NDRB) (When the output triggers of TPC output

groups 2 and 3 are different) ................................................................................ 584

A.3

Appendix B Pin States ....................................................................................................... 588

Appendix C External Dimensions ................................................................................. 594

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