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SH7021 датащи(PDF) 55 Page - Renesas Technology Corp |
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SH7021 датащи(HTML) 55 Page - Renesas Technology Corp |
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55 / 509 page ![]() 34 RENESAS Table 2.13 Arithmetic Instructions (cont) Instruction Instruction Code Operation Execution Cycles T bit EXTS.W Rm,Rn 0110nnnnmmmm1111 A word in Rm is sign- extended → Rn 1 — EXTU.B Rm,Rn 0110nnnnmmmm1100 A byte in Rm is zero- extended → Rn 1 — EXTU.W Rm,Rn 0110nnnnmmmm1101 A word in Rm is zero- extended → Rn 1 — MAC.W @Rm+,@Rn+ 0100nnnnmmmm1111 Signed operation of (Rn) × (Rm) + MAC → MAC 3/(2)* — MULS Rm,Rn 0010nnnnmmmm1111 Signed operation of Rn × Rm → MAC 1–3* — MULU Rm,Rn 0010nnnnmmmm1110 Unsigned operation of Rn × Rm → MAC 1–3* — NEG Rm,Rn 0110nnnnmmmm1011 0–Rm → Rn 1 — NEGC Rm,Rn 0110nnnnmmmm1010 0–Rm–T → Rn, Borrow → T 1 Borrow SUB Rm,Rn 0011nnnnmmmm1000 Rn–Rm → Rn 1 — SUBC Rm,Rn 0011nnnnmmmm1010 Rn–Rm–T → Rn, Borrow → T 1 Borrow SUBV Rm,Rn 0011nnnnmmmm1011 Rn–Rm → Rn, Underflow → T 1 Underflow Note: The normal minimum number of execution cycles (The number in parenthesis in the number of cycles when there is contension with preceding/following instructions). |
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