32186 datasheet(94/1032 Pages) RENESAS

94 / 1032 page

ADDRESS SPACE

3-44

32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

SFR Area Register Map (36/37)

Address

+0 address

+1 address

See pages

b7 b8

b15

H'0080 2000

DIN Interrupt Request Status Register

DIN Interrupt Request Enable Register

14-9

(DRIDINIST)

(DRIDINIEN)

H'0080 2002

DEC Interrupt Request Status Register

DEC Interrupt Request Enable Register

14-10

(DRIDECIST)

(DRIDECIEN)

H'0080 2004

DRI Transfer Interrupt Request Status Register

DRI Transfer Interrupt Request Enable Register

14-11

(DRITRMIST)

(DRITRMIEN)

14-12

H'0080 2006

DRI Transfer Control Register

DRI Special Mode Register

14-13

(DRITRMCNT)

(DRISPMOD)

14-15

H'0080 2008

DRI Data Capture Control Register

14-18

(DRIDCAPCNT)

H'0080 200A

DRI Data Interleave Control Register

DIN Input Event Select Register

14-22

(DRIDSELCNT)

(DINSEL)

H'0080 200C

DD Input Enable Register 0

DD Input Enable Register 1

14-23

(DRIDDEN0)

(DRIDDEN1)

H'0080 200E

DD Input Enable Register 2

DD Input Enable Register 3

14-23

(DRIDDEN2)

(DRIDDEN3)

14-24

H'0080 2010

DRI Data Capture Event Count Setting Register

(Upper)

14-25

(DRIDCAPNUM)

H'0080 2012

(Lower)

H'0080 2014

DRI Capture Event Counter

(Upper)

14-26

(DRIDCAPCT)

H'0080 2016

(Lower)

H'0080 2018

DRI Transfer Counter

(Upper)

14-27

(DRITRMCT)

H'0080 201A

(Lower)

(Use inhibited area)

H'0080 2020

DRI Address Reload Register 0

(Upper)

14-29

(DRIADR0RLD)

H'0080 2022

(Lower)

H'0080 2024

DRI Address Counter 0

(Upper)

14-28

(DRIADR0CT)

H'0080 2026

(Lower)

H'0080 2028

DRI Address Reload Register 1

(Upper)

14-29

(DRIADR1RLD)

H'0080 202A

(Lower)

H'0080 202C

DRI Address Counter 1

(Upper)

14-28

(DRIADR1CT)

H'0080 202E

(Lower)

H'0080 2030

DIN Input Processing Control Register

14-30

(DINCNT)

H'0080 2032

DEC0 Control Register

(Use inhibited area)

14-31

(DEC0CNT)

H'0080 2034

DEC0 Reload Register

14-36

(DEC0RLD)

H'0080 2036

DEC0 Counter

14-36

(DEC0CT)

H'0080 2038

DEC1 Control Register

(Use inhibited area)

14-31

(DEC1CNT)

H'0080 203A

DEC1 Reload Register

14-36

(DEC1RLD)

H'0080 203C

DEC1 Counter

14-36

(DEC1CT)

H'0080 203E

DEC2 Control Register

(Use inhibited area)

14-32

(DEC2CNT)

H'0080 2040

DEC2 Reload Register

14-36

(DEC2RLD)

H'0080 2042

DEC2 Counter

14-36

(DEC2CT)

H'0080 2044

DEC3 Control Register

(Use inhibited area)

14-32

(DEC3CNT)

3.4 Internal RAM and SFR Areas

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