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32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

3.3 Internal ROM and External Extension Areas

The 64-Mbyte area in the user space from the address H’0000 0000 to the address H’03FF FFFF comprise the

internal ROM and external extension areas. For the address mapping of these areas that differs with each

operation mode, see Section 3.2, “Operation Modes.”

3.3.1 Internal ROM Area

The internal ROM is allocated to the addresses shown below. Located at the beginning of this area is the EIT

vector entry (and the ICU vector table).

Table 3.3.1 Internal ROM Allocation Address

Type Name

Size

Allocation Address

M32185F4

512 Kbytes

H’0000 0000 to H’0007 FFFF

M32186F8

1 Mbyte

H’0000 0000 to H’000F FFFF

3.3.2 External Extension Area

The external extension area is only available when external extension or processor mode is selected by

operation mode settings. When accessing the external extension area, the control signals necessary to

access external devices are output.

The CS0# through CS3# signals are output corresponding to the address mapping of the external extension area.

The CS0#, CS1#, CS2# and CS3# signals are output for the CS0, CS1, CS2 and CS3 areas, respectively.

Table 3.3.2 Address Mapping of the External Extension Area in Each Operation Mode

Operation Mode

Address Mapping of External Extension Area

Single-chip mode

None

External extension mode

Addresses H’0010 0000 to H’007F FFFF (CS0 area: 7 Mbytes)

Addresses H’0100 0000 to H’017F FFFF (CS1 area: 8 Mbytes)

Addresses H’0200 0000 to H’027F FFFF (CS2 area: 8 Mbytes)

Addresses H’0300 0000 to H’037F FFFF (CS3 area: 8 Mbytes)

Processor mode

Addresses H’0000 0000 to H’007F FFFF (CS0 area: 8 Mbytes)

Addresses H’0100 0000 to H’017F FFFF (CS1 area: 8 Mbytes)

Addresses H’0200 0000 to H’027F FFFF (CS2 area: 8 Mbytes)

Addresses H’0300 0000 to H’037F FFFF (CS3 area: 8 Mbytes)

3.3 Internal ROM and External Extension Areas

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