32186 datasheet(69/1032 Pages) RENESAS

69 / 1032 page

ADDRESS SPACE

3-19

32185/32186 Group Hardware Manual

Rev.1.10 REJ09B0235-0110 May 15, 07

SFR Area Register Map (11/37)

Address

+0 address

+1 address

See pages

b7 b8

b15

H'0080 0482

(Use inhibited area)

DMA1 Channel Control Register 2

9-26

(DM1CNT2)

H'0080 0484

(Use inhibited area)

DMA2 Channel Control Register 2

9-26

(DM2CNT2)

H'0080 0486

(Use inhibited area)

DMA3 Channel Control Register 2

9-26

(DM3CNT2)

H'0080 0488

(Use inhibited area)

DMA4 Channel Control Register 2

9-26

(DM4CNT2)

(Use inhibited area)

H'0080 0490

(Use inhibited area)

DMA5 Channel Control Register 2

9-26

(DM5CNT2)

H'0080 0492

(Use inhibited area)

DMA6 Channel Control Register 2

9-26

(DM6CNT2)

H'0080 0494

(Use inhibited area)

DMA7 Channel Control Register 2

9-26

(DM7CNT2)

H'0080 0496

(Use inhibited area)

DMA8 Channel Control Register 2

9-26

(DM8CNT2)

H'0080 0498

(Use inhibited area)

DMA9 Channel Control Register 2

9-26

(DM9CNT2)

(Use inhibited area)

H'0080 0500

Port Group 0,1 Input Level Setting Register

Port Group 3 Input Level Setting Register

8-33

(PG01LEV)

(PG3LEV)

H'0080 0502

Port Group 4,5 Input Level Setting Register

Port Group 6,7 Input Level Setting Register

8-33

(PG45LEV)

(PG67LEV)

H'0080 0504

Port Group 8 Input Level Setting Register

(Use inhibited area)

8-33

(PG8LEV)

H'0080 0506

(Use inhibited area)

H'0080 0508

Port Group 0,1 Output Drive Capability Setting Register

Port Group 3 Output Drive Capability Setting Register

8-35

(PG01DRV)

(PG3DRV)

H'0080 050A

Port Group 4,5 Output Drive Capability Setting Register

Port Group 6,7 Output Drive Capability Setting Register

8-35

(PG45DRV)

(PG67DRV)

H'0080 050C

Port Group 8 Output Drive Capability Setting Register

P70 Output Drive Capability Setting Register

8-35

(PG8DRV)

(P70DRV)

8-36

H'0080 050E

(Use inhibited area)

H'0080 0510

Noise Canceller Control Register

8-38

(NZCNSLCR)

(Use inhibited area)

H'0080 0520

PWM Output 0 Disable Control Register GA

PWM Output 0 Disable Level Control Register GA

10-168

(PO0DISGACR)

(PO0LVGACR)

10-171

H'0080 0522

PWM Output 1 Disable Control Register GA

PWM Output 1 Disable Level Control Register GA

10-168

(PO1DISGACR)

(PO1LVGACR)

10-171

H'0080 0524

(Use inhibited area)

H'0080 0526

PWMOFF 0 Function Enable Register

PWMOFF 1 Function Enable Register

10-173

(PWMOFF0EN)

(PWMOFF1EN)

H'0080 0528

(Use inhibited area)

H'0080 052A

CAN Bus Mode Control Register

DD Input Pin Select Register

13-23

(CANBUSCR)

(DDSEL)

14-6

(Use inhibited area)

H'0080 0530

RAM Write Monitor Interrupt Status Register

6-4

(RAMWRIST)

H'0080 0532

(Use inhibited area)

H'0080 0534

RAM Write Source Status Register

6-5

(RAMWRFST)

H'0080 0536

(Use inhibited area)

H'0080 0538

RAM Write Disable Control Register

6-6

(RAMWRCNT)

H'0080 053A

(Use inhibited area)

3.4 Internal RAM and SFR Areas

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