| поискавой системы для электроныых деталей |
|
HD6432351 датащи(PDF) 173 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
HD6432351 датащи(HTML) 173 Page - Renesas Technology Corp |
|
173 / 1025 page ![]() Section 6 Bus Controller Rev. 3.00 Sep 15, 2006 page 139 of 988 REJ09B0330-0300 Bit 6—RAS-CAS Wait (RCW): Controls wait state insertion in DRAM interface CAS-before- RAS refreshing. Bit 6 RCW Description 0 Wait state insertion in CAS-before-RAS refreshing disabled (Initial value) RAS falls in TRr cycle 1 One wait state inserted in CAS-before-RAS refreshing RAS falls in TRc1 cycle Bit 5—Refresh Mode (RMODE): When refresh control is performed (RFSHE = 1), this bit selects whether normal refreshing (CAS-before-RAS refreshing for the DRAM interface) or self- refreshing is performed. Bit 5 RMODE Description 0 DRAM interface CAS-before-RAS refreshing used (Initial value) 1 Self-refreshing used Bit 4—Compare Match Flag (CMF): Status flag that indicates a match between the values of RTCNT and RTCOR. When refresh control is performed (RFSHE = 1), 1 should be written to the CMF bit when writing to DRAMCR. Bit 4 CMF Description 0 [Clearing condition] Cleared by reading the CMF flag when CMF = 1, then writing 0 to the CMF flag (Initial value) 1 [Setting condition] Set when RTCNT = RTCOR |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |