M16CSLASH29 datasheet(287/499 Pages) RENESAS

287 / 499 page

16. MULTI-MASTER I2C bus INTERFACE

page 263

Figure 16.8 S2D0 Register

NOTES:

1. Do not set odd values or 000002 to START/STOP condition setting bits (SSC4 to SSC0)

2. When the PCLK0 bit in the PCLKR register is set to 1.

Oscillation

I2C bus system I2C bus system

SSC4-SSC0(1)

SCL release

Setup time

Hold time

(MHz)

clock select

clock(MHz)

time (cycle)

(cycle)

1 / 2f1(2)

XXX11110

6.2 µs (31)

3.2 µs (16)

3.0 µs (15)

1 / 2f1(2)

XXX11010

6.75 µs(27)

3.5 µs (14) 3.25 µs(13)

XXX11000

6.25 µs(25)

3.25 µs (13) 3.0 µs (12)

1 / 8f1(2)

XXX00100

5.0 µs (5)

3.0 µs (3)

2.0 µs (2)

1 / 2f1(2)

XXX01100

6.5 µs (13)

3.5 µs (7)

3.0 µs (6)

XXX01010

5.5 µs (11)

3.0 µs (6)

2.5 µs (5)

1 / 2f1(2)

XXX00100

5.0 µs (5)

3.0 µs (3)

2.0 µs (2)

Table 16.2 Recommended setting (SSC4-SSC0) start/stop condition at each oscillation frequency

0: Short setup/hold time mode

1: Long setup/hold time mode

0: SDA enabled

1: SCL enabled

0: Active in falling edge

1: Active in rising edge

START/STOP condition

generation select bit

SCL/SDA interrupt pin

select bit

SCL/SDA interrupt pin

polarity select bit

START/STOP condition

setting bits(1)

STSPSEL

SIS

SIP

SSC4

SSC3

SSC2

SSC1

SSC0

Function

Bit Name

Bit Symbol

000110102

After Reset

02E516

Address

Symbol

S2D0

C0 Start/stop Condition Control Register

b7 b6 b5 b4 b3 b2b1b0

NOTE:

1. Do not set 000002 or odd values.

Setting for detection condition

of START/STOP condition.

See Table 16.2

M16C/29 датащи(PDF) 287 Page - Renesas Technology Corp

M16C/29 датащи(HTML) 287 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL