MSC7119 datasheet(57/60 Pages) FREESCALE

57 / 60 page

Ordering Information

MSC7119 Data Sheet, Rev. 8

Freescale Semiconductor

3.6

Connectivity Guidelines

This section summarizes the connections and special conditions, such as pull-up or pull-down resistors, for the MSC7119

device. Following are guidelines for signal groups and configuration settings:

•

Clock and reset signals.

— SWTE is used to configure the MSC7119 device and is sampled on the deassertion of PORESET, so it should be

tied to VDDC or GND either directly or through pull-up or pull-down resistors until PORESET is deasserted. After

PORESET

, this signal can be left floating.

— BM[0–1] configure the MSC7119 device and are sampled until PORESET is deasserted, so they should be tied to

VDDIO or GND either directly or through pull-up or pull-down resistors.

— HRESET should be pulled up.

•

Interrupt signals. When used, IRQ pins must be pulled up.

•

HDI16 signals.

— When they are configured for open-drain, the HREQ/HREQ or HTRQ/HTRQ signals require a pull-up resistor.

However, these pins are also sampled at power-on reset to determine the HDI16 boot mode and may need to be

pulled down. When these pins must be pulled down on reset and pulled up otherwise, a buffer can be used with

the HRESET signal as the enable.

— When the device boots through the HDI16, the HDDS, HDSP and H8BIT pins should be pulled up or down,

depending on the required boot mode settings.

•

Ethernet MAC/TDM2 signals. The MDIO signal requires an external pull-up resistor.

•

I2C signals. The SCL and SDA signals, when programmed for I2C, requires an external pull-up resistor.

•

General-purpose I/O (GPIO) signals. An unused GPIO pin can be disconnected. After boot, program it as an output

pin.

•

Other signals.

—The TEST0 pin must be connected to ground.

—The TPSEL pin should be pulled up to enable debug access via the EOnCE port and pulled down for boundary

scan.

— Pins labelled NO CONNECT (NC) must not be connected.

— When a 16-pin double data rate (DDR) interface is used, the 16 unused data pins should be no connects (floating)

if the used lines are terminated.

— Do not connect DBREQ to DONE (as you would for the MSC8101 device). Connect DONE to one of the EVNT

pins, and DBREQ to HRRQ.

Ordering Information

Consult a Freescale Semiconductor sales office or authorized distributor to determine product availability and place an order.

Part

Supply Voltage

Package Type

Count

Core

Frequency

(MHz)

Solder Spheres

Order Number

MSC7119

1.2 V core

2.5 V memory

3.3 V I/O

Molded Array Process-Ball Grid

Array (MAP-BGA)

400

300

Lead-free

MSC7119VM1200

Lead-bearing

MSC7119VF1200

MSC7119 датащи(PDF) 57 Page - Freescale Semiconductor, Inc

MSC7119 датащи(HTML) 57 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

датащи скачать

ссылки URL