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MSC7119 датащи(PDF) 47 Page - Freescale Semiconductor, Inc

номер детали MSC7119
подробное описание детали  Low-Cost 16-bit DSP with DDR Controller and 10/100 Mbps Ethernet MAC
PDF  60 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MSC7119 датащи(HTML) 47 Page - Freescale Semiconductor, Inc

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Hardware Design Considerations
MSC7119 Data Sheet, Rev. 8
Freescale Semiconductor
47
3.2.2.5
Case 5 (not recommended for new designs)
The power-up sequence is as follows:
1.
Turn on the VDDIO (3.3 V) supply first.
2.
Turn on the VDDM (2.5 V) supply second.
3.
Turn on the VDDC (1.2 V) supply third.
4.
Turn on the VREF (1.25 V) supply fourth (last).
Note:
Make sure that the time interval between the ramp-up of VDDIO and VDDM is less than 10 ms.
The power-down sequence is as follows:
1.
Turn off the VREF (1.25 V) supply first.
2.
Turn off the VDDC (1.2 V) supply second.
3.
Turn off the VDDM (2.5 V) supply third.
4.
Turn of the VDDIO (3.3 V) supply fourth (last).
Use the following guidelines:
•
Make sure that the time interval between the ramp-down of VDDIO and VDDM is less than 10 ms.
•
Make sure that the time interval between the ramp-up or ramp-down for VDDC and VDDM is less than 2 ms for
power-up and power-down.
•
Refer to Figure 34 for relative timing for power sequencing case 5.
Note:
Cases 1, 2, 3, and 4 are recommended for system design. Designs that use Case 5 may have large current spikes on
the VDDM supply at startup and is not recommended for most designs. If a design uses case 5, it must accommodate
the potential current spikes. Verify risks related to current spikes using actual information for the specific application.
Figure 34. Voltage Sequencing Case 5
Time
Ramp-down
Ramp-up
VDDIO = 3.3 V
VDDM = 2.5 V
VDDC = 1.2 V
VREF = 1.25 V
<10 ms
<2 ms
<2 ms
<10 ms



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