ST72411R datasheet(35/71 Pages) STMICROELECTRONICS

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ST72411R

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8-BIT TIMER (Cont’d)

5.3.3 Counter/Prescaler Description

Counter

The free running 8-bit downcounter is fed by the

output of the programmable prescaler, and is dec-

remented on every rising edge of the fCOUNTER

clock signal.

It is possible to read or write the contents of the

counter on the fly, by reading or writing the timer

counter register (TCR).

When a counter underflow occurs, the counter is

automatically reloaded with the value FFh.

Counter clock and prescaler

The counter clock frequency is given by:

fCOUNTER =fTIMER /8

PS[1:0]

where fTIMER can be:

–fCPU/16

–fEXT (input on TIMIO pin)

–fCPU/16 gated by TIMIO pin

Table 13 lists the values that fCOUNTER can take if

fTIMER is fCPU/16.

Table 9. fcounter values for a fcpu=3.58MHz

The timer input clock (fTIMER) feeds the 9-bit pro-

grammable prescaler. The prescaler output can be

programmed by selecting one of the 4 available

prescaler taps using the PS[1:0] bits in the Status/

Control Register (TSCR). Thus the division factor

of the prescaler can be set to 8n (where n equals 0,

1, 2 or 3). See Figure 38.

The clock input is enabled by the PSE (Prescaler

Enable) bit in the TSCR register. When PSE is re-

set, the counter is frozen and the prescaler is load-

ed with the value 1FFh. When PSE is set, the

prescaler and the counter run at the rate of the se-

lected clock source.

Counter and Prescaler Initialization

After RESET, the counter and the prescaler are in-

itialized to FFh and 1FFh respectively.

The 9-bit prescaler can be initialized separately to

1FFh by clearing the PSE bit. Direct write access

to the prescaler is not possible.

The 8-bit counter can be initialized separately by

writing to the TCR register.

fcounter

PS0

PS1

224 kHz

28 kHz

3.5 kHz

437 Hz

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