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MK50H25PLCC датащи(PDF) 35 Page - STMicroelectronics |
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MK50H25PLCC датащи(HTML) 35 Page - STMicroelectronics |
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35 / 64 page ![]() 4.2.9 Error Counters Seven locations in the Initialization buffer are reserved for use as error counters which the MK50H25 will increment. These counters are intended for use by the host CPU for statistical analysis. The MK50H25 will only increment the counters; it is up to the user to clear and preset them. The error counters are: Memory Address Error Counter IADR + 44 Bad Frames Received - Bad FCS - Non-Octet Aligned IADR + 46 Number of FRMR frames received. IADR + 48 Number of T1 timeouts. IADR + 50 Number of REJ frames received. IADR + 52 Number of REJ frames transmitted. IADR + 54 Frames shorter than minimum length received. IADR + 56 Number of Aborted frames received. Enabled only if FCSER = 1 IADR + 58 thru IADR + 60 Reserved. Must be programmed as zeroes only if EIBEN = 1. 4.3 Receive and Transmit Descriptor Rings Each descriptor ring in memory is a 4 word entry. The following is the format of the receive and transmit descriptors. 4.3.1 Receive Message Descriptor Entry 4.3.1.1 Receive Message Descriptor 0 (RMD0) BIT NAME DESCRIPTION 15 OWNA When this bit is a zero either the HOST or the I/O ACCELERATION PROCESSOR owns this descriptor. When this bit is a one the MK50H25 owns this descriptor. The chip clears the OWNA bit af- ter filling the buffer pointed to by the descriptor entry provided a valid frame has been received. The Host sets the OWNA bit after emp- tying the buffer. Once the MK50H25, Host, or I/O acceleration processor has relinquished ownership of a buffer, it may not change any field in the four words that comprise the descriptor entry. 14 OWNB This bit determines whether the HOST or a Slave Processor or Process owns the buffer when OWNA is a zero. The MK50H25 never uses this bit. 13 SLF Start of Long Frame indicates that this is the first buffer used by the MK50H25 for this frame. It is used for data chaining buffers. SLF is set by the MK50H25. NOTE: A ”Long Frame” is any frame which needs chaining. 12 ELF End of Long Frame indicates that this the last buffer used by MK50H25 for this frame. It is used for data chaining buffers. If both SLF and ELF were set, the frame would fit into one buffer and no data chaining would be required. ELF is set by the MK50H25. 1 5 1 4 1 3 0 7 0 8 1 0 1 1 1 2 0 1 0 2 0 3 0 4 0 5 0 0 0 9 0 6 RBADR<23:16> A R D R O W N A O W N B F R M R R R P F S L F E L F U I R MK50H25 35/64 |
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