M7040N datasheet(28/159 Pages) STMICROELECTRONICS

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M7040N

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SEARCH ENGINE ARCHITECTURE

The M7040N consists of 64K x 72-bit storage cells

referred to as data bits. There is a mask cell corre-

sponding to each data cell. Figure 15 shows the

three organizations of the device based on the val-

ue of the CFG bits in the command register.

During a SEARCH operation, the search data bit

(S), data array bit (D), mask array bit (M) and the

global mask bit (G) are used in the following man-

ner to generate a match at that bit position (see

Table 16, page 29).

The entry with all matched bit positions results in a

successful search during a SEARCH operation.

In order for a successful search within a device to

make the device the local winner in the SEARCH

operation, all 72-bit positions must generate a

match for a 72-bit entry in 72-bit-configured quad-

rants, or all 144-bit positions must generate a

match for two consecutive even and odd 72-bit en-

tries in quadrants configured as 144 bits, or all

288-bit positions must generate a match for 4 con-

secutive entries aligned to 4 entry-page bound-

aries of 72-bit entries in quadrants configured as

288 bits.

An arbitration mechanism using a cascade bus de-

termines the global winning device among the lo-

cal winning devices in a SEARCH cycle. The

global winning device drives the SRAM Bus, SSV,

and the SSF signals. In case of a SEARCH failure,

the devices with the LDEV and LRAM bits set

drive(s) the SRAM Bus, SSF, and SSV signals

The M7040N device can be configured to contain

tables of different widths, even within the same

chip. Figure 16, page 29 shows a sample configu-

ration of different widths.

Data and Mask Addressing

Figure 17, page 29 shows the M7040N data array

and mask array addressing procedure.

Figure 15. M7040N Database Width Configuration

Data

Masks

64 K

CFG = 0000000000000000

CFG = 0101010101010101

CFG = 1010101010101010

144

288

32 K

16 K

AI04669

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