AT25DF021A-DWFHT datasheet(19/59 Pages) RENESAS

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DS-AT25DF021A-042 Rev. L

Page 19

8/7/23

AT25DF021A Datasheet

8.3

Sequential Program Mode

The Sequential Program Mode improves throughput over the Byte/Page Program command when the Byte/Page

Program command is used to program single bytes only into consecutive address locations. For example, some

systems are designed to program only a single byte of information at a time and cannot use a buffered Page

Program operation due to design restrictions. In such a case, the system would normally have to perform multiple

Byte Program operations in order to program data into sequential memory locations. This approach can add

considerable system overhead and SPI bus traffic.

The Sequential Programming Mode helps reduce system overhead and bus traffic by incorporating an internal

address counter that keeps track of the byte location to program, thereby eliminating the need to supply an

address sequence to the device for every byte to program. When using the Sequential Program mode, all address

locations to be programmed must be in the erased state. Before the Sequential Program mode can first be

entered, the Write Enable command must have been previously issued to the device to set the WEL bit of the

Status Register to a logical 1 state.

To start the Sequential Program Mode, the CS pin must first be asserted, and either an opcode of ADh or AFh

must be clocked into the device. For the first program cycle, three address bytes must be clocked in after the

opcode to designate the first byte location to program. After the address bytes have been clocked in, the byte of

data to be programmed can be sent to the device. Deasserting the CS pin starts the internally self-timed program

operation, and the byte of data is programmed into the memory location specified by A23 - A0.

After the first byte has been successfully programmed, a second byte can be programmed by simply reasserting

the CS pin, clocking in the ADh or AFh opcode, and then clocking in the next byte of data. When the CS pin is

deasserted, the second byte of data is programmed into the next sequential memory location. The process would

be repeated for any additional bytes. There is no need to reissue the Write Enable command once the Sequential

Program Mode has been entered.

When the last desired byte has been programmed into the memory array, the Sequential Program Mode operation

can be stopped by reasserting the CS pin and sending the Write Disable command to the device to reset the WEL

bit in the Status Register back to the logical 0 state.

If more than one byte of data is ever clocked in during each program cycle, then only the last byte of data sent on

the SI pin is stored in the internal latches. The programming of each byte is internally self-timed and takes place in

a time of tBP. For each program cycle, a complete byte of data must be clocked into the device before the CS pin

is deasserted, and the CS pin must be deasserted on even byte boundaries (multiples of eight bits); otherwise, the

device stops the operation, the byte of data is not programmed into the memory array, and the WEL bit in the

Status Register is reset back to the logical 0 state.

If the address initially specified by A23 - A0 points to a memory location within a sector that is in the protected

state, then the Sequential Program Mode command is not executed, and the device returns to the idle state once

the CS pin has been deasserted. The WEL bit in the Status Register is also reset back to the logical 0 state.

There is no address wrapping when using the Sequential Program Mode. Thus, when the last byte (03FFFFh) of

the memory array has been programmed, the device automatically exits the Sequential Program mode and reset

the WEL bit in the Status Register back to the logical 0 state. Also, the Sequential Program mode does not

automatically skip over protected sectors; thus, once the highest unprotected memory location in a programming

sequence has been programmed, the device automatically exits the Sequential Program mode and reset the WEL

bit in the Status Register. For example, if Sector 1 was protected and Sector 0 was currently being programmed,

once the last byte of Sector 0 was programmed, the Sequential Program mode would automatically end. To

continue programming with Sector 2, the Sequential Program mode would have to be restarted by supplying the

ADh or AFh opcode, the three address bytes, and the first byte of Sector 2 to program.

While the device is programming a byte, the Status Register can be read and indicates that the device is busy. For

faster throughput, it is recommended that the Status Register be polled at the end of each program cycle rather

than waiting the tBP time to determine if the byte has finished programming before starting the next Sequential

Program mode cycle.

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