AT25DF021A-DWFHT datasheet(31/59 Pages) RENESAS

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DS-AT25DF021A-042 Rev. L

Page 31

8/7/23

AT25DF021A Datasheet

11. Status Register Commands

11.1 Read Status Register

The Status Register can be read to determine the device's ready/busy status, as well as the status of many other

functions such as Hardware Locking and Software Protection. The Status Register can be read at any time,

including during an internally self-timed program or erase operation.The Status Register consists of two bytes.

To read the Status Register, the CS pin must first be asserted and the opcode of 05h must be clocked into the

device. After the opcode has been clocked in, the device begins outputting Status Register data on the SO pin

during every subsequent clock cycle. After the last bit (bit 0) of Status Register Byte 2 has been clocked out, the

sequence repeats itself, starting again with bit 7 of Status Register Byte 1, as long as the CS pin remains asserted

and the clock pin is being pulsed. The data in the Status Register is constantly being updated, so each repeating

sequence outputs new data.

Deasserting the CS pin stops the Read Status Register operation and put the SO pin into a high-impedance state.

The CS pin can be deasserted at any time and does not require that a full byte of data be read.

11.1.1

SPRL Bit

The SPRL bit is used to control whether the Sector Protection Registers can be modified or not. When the SPRL

bit is in the logical 1 state, all Sector Protection Registers are locked and cannot be modified with the Protect

Sector and Unprotect Sector commands (the device ignores these commands). Also, the Global Protect and

Global Unprotect features cannot be performed. Any sectors that are presently protected remain protected, and

any sectors that are presently unprotected remain unprotected.

Table 9. Status Register Format

Bit[1]

1. Only bit 7 of the Status Register are modified when using the Write Status Register command.

Name

Type[2]

2. R/W = Readable and writable

R = Readable only

Description

SPRL

Sector Protection Registers Locked

R/W

Sector Protection Registers are unlocked (default).

Sector Protection Registers are locked.

SPM

Sequential Program Mode Status

Byte/Page Programming Mode (default).

Sequential Programming Mode entered.

EPE

Erase/Program Error

Erase or program operation was successful.

Erase or program error detected.

WPP

Write Protect (WP) Pin Status

0WP is asserted.

1WP is deasserted.

3:2

SWP

Software Protection Status

All sectors are software unprotected (all Sector

Protection Registers are 0).

Some sectors are software protected. Read

individual Sector Protection Registers to determine

which sectors are protected.

Reserved for future use.

All sectors are software protected (all Sector

Protection Registers are 1 – default).

WEL

Write Enable Latch Status

Device is not write enabled (default).

Device is write enabled.

RDY/BS

Ready/Busy Status

Device is ready.

Device is busy with an internal operation.

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