AX99100QF datasheet(37/70 Pages) ASIX

37 / 70 page

AX99100

PCIe to Multi I/O Controller

PCIe BAR1 Range (0x1D~0x1C)

Bit

Description

IO SPACE

1: Indicates Local Address Space 0 maps into I/O space.

0: Indicates Local Address Space 0 maps into Memory space.

Hardware Default Value: 0x0

2:1

Space Decode

When mapped into Memory space, the only valid value is 00. (32-bit access space with

non-prefetchable)

When mapped into I/O space, bit 1 should be ‘0’ and bit 2 will be loaded to BADDR1[2] to indicate the

decoding range.

Hardware Default Value: 0x0

Prefetchable

When mapped into Memory space, ‘1’ indicates reads are prefetchable.

When mapped into I/O space, this bit will be loaded to BADDR1[3] to indicate the decoding range.

Hardware Default Value: 0x0

15:4

BADDR1[15:4]

Specifies which Address bits to be used for decoding the PCIe access to Local Address Space 1. Each

bit corresponds to Address bit. ‘1’ is for PCI address decoding and ‘0’ means the occupied range for the

BAR1 access. The address bit 31 to 16 of BAR1 is always ‘1’.

Hardware Default Value: 0x000 (64KByte)

Local Address Space 0 Setting (0x21~0x20)

Bit

Description

INT0 Polarity

1: Active High

0: Active Low

Hardware Default Value: 0x0

INT0 Trigger Style

1: Level Trigger

0: Edge Trigger

Hardware Default Value: 0x0

DREQ0 Polarity

1: Active High

0: Active Low

Hardware Default Value: 0x0

DACK0 Polarity

1: Active High

0: Active Low

Hardware Default Value: 0x1

Local Address Space 0 External Ready Control

1: External RDY control usage for Local Address Space 0 bus access

0: Internal counter used for Local Address Space 0 bus access

Hardware Default Value: 0x0

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