AX99100QF datasheet(33/70 Pages) ASIX

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AX99100

PCIe to Multi I/O Controller

Hardware Default value:

1: In LB, PP or SPI mode

0: Others

Serial Port 4 System Clock Disable

1: Disabled Serial Port 4 system clock

0: Enable Serial Port 4 system clock

Hardware Default value:

1: in LB, PP or SPI mode

0: Others

SPI System Clock Disable

1: Disabled SPI system clock

0: Enabled SPI system clock

Hardware Default value:

0: In SPI mode.

1: Others

Reserved

Global Setting (0x56)

Bit

Description

3:0

PCIe Function Enable

Indicates the function existed or not in PCIe system. Bit0 is for Function 1, Bit1 is for Function 2 and

Bit2 is for function 3. Note Bit3 should be set to ‘0’ and the Function 0 is always enabled in

AX99100.

1: Enabled the corresponding PCIe Function.

0: Disabled the corresponding PCIe Function.

Hardware Default value:

0x0: For LB mode (CHIP_MODE= 000)

0x3: For PP related mode (CHIP_MODE=001 and 010)

0x5: For SPI related mode (CHIP_MODE=100 and 110)

0x7: Others

ECRC forwarding to and from the Application Layer implemented.

This field should always set to 0b

7:5

Reserved

Check-Sum (0x5B)

Bit

Description

7:0

Check-Sum Value

Hardware Check-Sum verification is the sum of the all bytes from offset 0x00 to 0x5B with an 8bit adder

and the carry need to be added back to bit0. The final value should equal to the Hardware pre-define, 0x79.

So the Check-Sum value should be used to adjust the final value to 0x79 to pass the Check-Sum

verification. If the check-sum verification failed, Hardware will not load the EEPROM contents and use

the Hardware default value to replace it. Please reference section 3.3.3 in detail.

For example, if the summation is 0x7A from offset 0x00 to 0x5A. Due to 0x7A is large than 0x79, the

Check-Sum Value should be 0xFE (0x79-0x7A-0x01). If the summation is 0x79, Check-Sum Value will

be 0x00 (0x79-0x79).

Reserved (0x5C-0x7F)

EEPROM address 0x5C~0x7F are Reserved.

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