AX99100QF datasheet(24/70 Pages) ASIX

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AX99100

PCIe to Multi I/O Controller

GPIO Function

2.8

There are up to 24 General Purpose Input/output pins (GPIO[23:0]) in AX99100, reference section 1.4.1, Table 1-4,

in none Local Bus mode. The driving strength of GPIO[7:0] are 8mA and GPIO[23:8] are 4mA only. Each GPIO pin

is independent and can be configured for input or output, open drain or direct drive, internal pull-up enabled and event

mode detection for IRQ generation. Due to GPIO[5:2] have been used for CHIP_MODE and 3.3Vaux detection,

these pins can be used as the directed drive output pin without internal pull-up feature.

Power Management

2.9

The AX99100 supports the following power management and budgeting features.



Compliant with PCI Power Management Interface Specification 1.2



Supports Native Active State Power Management L0s state



Supports Power Management Event (PME message)



Supports CLK_REQ mechanism for Express card interface



Supports wakeup from D3 hot and D3 cold states

AX99100 supports all the device power management states defined in PCI Bus Power Management Interface

Specification 1.2. Power Management capabilities are mentioned in Power Management Capability (PMC) register

of configuration space which provides information on the capabilities of the function related to power management.

Bit[15] of PMC, i.e. wake from D3 cold is supported only if auxiliary power is present, this bit is updated through

bootstrap option on pin “GPIO2” or “A3” (weak pull-up with supply 3.3V AUX is connected to pin “GPIO2” or

“A3”) and logic AND with the contents in Bit[2] of EEPROM offset 0Fh(Func0), 23h(Func1), 37h(Func2) and

4Bh(Func3) corresponds to Bit[15] of PMC, please reference section 3.3.1, Power Management Capabilities_Fx, in

detail.

AX99100 Supports wakeup from any power management capable device connected to AX99100 from both D3 hot

and D3 cold states.

D3 hot: Any device connected to AX99100 can wakeup the system from D3-hot state (Standby) through WAKEn

(referred as WAKE# in PCIe base specification 1.1) or through PME message. Default wakeup is through WAKEn.

EEPROM should be configured in order to wake the PC through PME message from D3 hot state.

D3 cold: Any devices connected to AX99100 can wakeup the system from D3-cold state (Hibernate) through

WAKEn only (referred as WAKE# in PCIe base Specification 1.1).

Note: There is NO power plane separation between 3.3V AUX and VCCIO in AX99100. In D3 Cold, the chip

VCCIO and VCC33A_REG should be powered from 3.3V AUX to support remote wake up.

AX99100QF датащи(PDF) 24 Page - ASIX Electronics Corporation