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L9969X датащи(PDF) 33 Page - STMicroelectronics |
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L9969X датащи(HTML) 33 Page - STMicroelectronics |
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33 / 70 page ![]() Note: • The feature VDD monitoring and the corresponding NABE behavior is not considered here as a power stage error. This is described in Section 2.6.2: NABE and VDD monitoring and in the explanation of VDDMON_REG. • There is a difference between errors and information. Information is: CURRLIM (current limitation, reported in DIA_REG2) and TDCR (temperature dependent current reduction, reported in DIA_REG2). During the retest procedure for confirming an error, the H-bridge will not react on any signal (and on any signal transition) on PWM or DIR. Also, after every confirmed error the H-bridge is switched off and is not automatically switched-on again, even if the error has disappeared in between. 3.2.6.5 Short circuit detection Both high side power stages are supervised continuously to detect any short circuit to ground or short circuit across load on OUT1 or OUT2. If the current rises during the blanking time tb beyond the limit Iouk, a short circuit to ground is detected. The H-bridge is switched off. After that, the error has to be confirmed in a first step, and it has to be checked whether there is only a simple short cut present or a SCL in a second step. This is to distinguish by an appropriate internal test procedure, refer to Section 3.2.6.6: Short circuit across load. Both low side power stages are supervised to detect any short circuit to battery or short circuit across load on OUT1 or OUT2. If the current rises during the blanking time tb beyond the limit Iouk, a short circuit to battery or short circuit across load is detected. The HBR is switched off. Then the error has to be confirmed, the HBR is switched on again. If the short circuit to battery is detected again, the error will be reported to the DIA_REG1. This is to distinguish by an appropriate internal test procedure, refer to Section 3.2.6.6: Short circuit across load. Figure 20. Short circuit detection principle IOUT IOC t ICL Blanking Time tb tDF_OFF tDF Operating Mode with Current Limiting Short-Circuit In fault case at any output pin, all output stages are switched off. Each half-bridge output stage is equipped with a short circuit protection up to battery voltages of 40 V. Parameters for overcurrent detection are specified in the range of 8 V to 18 V. The specified limits may vary in the range below 8 V (down to 5.5 V of min VSx) or above 18 V, however the function itself is guaranteed up to 40 V at VS. A short circuit condition at level 3 shall be detected, if the circuit, attached to the output, has an impedance ≤ 0.5 Ω and ≤ 25 µH at battery voltage of 13 V and 25 °C junction temperature. In order to get a good robustness against wrongly detected short circuits, especially with high battery voltages, L9969 is designed in order to keep a certain gap between short-circuit limit and current limitation threshold under all circumstances. 5 V < VBATT < 18 V, 4.5 V < VDD < 5.5 V, TJ= -40 °C to 150 °C, unless otherwise specified. L9969x Functional description DS14029 - Rev 6 page 33/70 |
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