L9969X datasheet(69/70 Pages) STMICROELECTRONICS

69 / 70 page

List of figures

Figure 1.

L9969S/L9969U single bridge IC block diagram ............................................. 2

Figure 2.

L9969T twin bridge IC block diagram..................................................... 3

Figure 3.

L9969S - pin connection (top view) ...................................................... 4

Figure 4.

L9969U - pin connection (top view) ...................................................... 4

Figure 5.

L9969T - pin connection (top view) ...................................................... 5

Figure 6.

Schematic of internal power supply ..................................................... 12

Figure 7.

VDD Monitoring and dependencies ..................................................... 14

Figure 8.

Overview of VDD voltage ranges ...................................................... 15

Figure 9.

Circuit diagram of VDD monitoring ..................................................... 16

Figure 10.

Inverse current ................................................................... 19

Figure 11.

Switching sequence during normal operation .............................................. 20

Figure 12.

Switching sequence during change of direction............................................. 21

Figure 13.

Power On delay from power down...................................................... 28

Figure 14.

Output delay time - depicted for LSx .................................................... 28

Figure 15.

Output rise and fall times ............................................................ 29

Figure 16.

Output disable and enable time - depicted for NABE input ..................................... 29

Figure 17.

Output disable and enable time - depicted for DIS input ....................................... 29

Figure 18.

Parameters during current limitation .................................................... 31

Figure 19.

Temperature-Dependent Current Reduction (TDCR) ......................................... 32

Figure 20.

Short circuit detection principle ........................................................ 33

Figure 21.

Principle of the short circuit across load detection ........................................... 34

Figure 22.

Principle of the short circuit across load detection (OVC on LS1 when PWM = 1) ..................... 35

Figure 23.

Principle of the short circuit across load detection (OVC on HS2 when PWM = 1) ..................... 36

Figure 24.

Open Load diagnosis in active mode .................................................... 37

Figure 25.

Principle of diagnosis in inactive mode................................................... 38

Figure 26.

Timings related to Open Load diagnostics ................................................ 39

Figure 27.

SPI block diagram................................................................. 40

Figure 28.

SPI data line management ........................................................... 41

Figure 29.

Standard SPI frame................................................................ 42

Figure 30.

SPI Timing diagrams ............................................................... 52

Figure 31.

Inputs/outputs of the H-bridge......................................................... 54

Figure 32.

Application circuit ................................................................. 57

Figure 33.

Load dump pulse clamped ........................................................... 59

Figure 34.

PowerSSO24 (exposed pad opt. A) package outline ......................................... 60

Figure 35.

PowerSSO36 (exposed pad opt. A) package outline ......................................... 62

L9969x

List of figures

DS14029 - Rev 6

page 69/70

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