TMS320VC33 datasheet(11/53 Pages) TI2

номер детали	TMS320VC33

подробное описание детали	SMx320VC33 Digital Signal Processor

PDF	53 Pages

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производитель	TI2 [Texas Instruments]

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SM320VC33, SMJ320VC33

www.ti.com

SGUS034F – FEBRUARY 2001 – REVISED JUNE 2015

6.9 Timing Requirements for XF0 and XF1 when Executing SIGI

see Figure 10

MIN

MAX

UNIT

tsu(XF1-H1L)

Setup time, XF1 before H1 low

4(1)

th(H1L-XF1)

Hold time, XF1 after H1 low

0(1)

(1)

Not production tested

6.10 Timing Requirements for Changing XFx from Output to Input Mode

see Figure 12

MIN

MAX

UNIT

tsu(XF-H1L)

Setup time, XFx before H1 low

th(H1L-XF)

Hold time, XFx after H1 low

6.11 Timing Requirements for RESET

MIN

MAX

UNIT

tsu(RESET-EXTCLKL)

Setup time, RESET before EXTCLK low

5(1)

P – 7(1)(2)

tsu(RESETH-H1L)

Setup time, RESET high before H1 low and after ten H1 clock cycles

(1)

Not production tested

(2)

P = tc(EXTCLK)

6.12 Timing Requirements for INT3 to INT0 Response

see Figure 15

MIN

NOM

MAX

UNIT

tsu(INT-H1L)

Setup time, INT3 to INT0 before H1 low

4(1)

th(H1L-INT)

Hold time, INT3 to INT0 after H1 low

tw(INT)

Pulse duration, interrupt to ensure only one interrupt

P + 5(1)(2)

1.5P

2P - 5(1)(2)

(1)

Not production tested

(2)

P = tc(H)

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