MPC8280 datasheet(102/1386 Pages) FREESCALE

102 / 1386 page

Overview

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

1-8

Freescale Semiconductor

The following list summarizes the major features of the CPM:

•

The CP is an embedded 32-bit RISC controller residing on a separate bus (CPM local bus) from

the 60x bus (used by the system core). With this separate bus, the CP does not affect the

performance of the G2_LE core. The CP handles the lower layer tasks and DMA control activities,

leaving the G2_LE core free to handle higher layer activities. The CP has an instruction set

optimized for communications, but can also be used for general-purpose applications, relieving the

system core of small often repeated tasks.

•

Two serial DMA (SDMA) that can do simultaneous transfers, optimized for burst transfers to the

60x bus and to the local bus.

•

Three full-duplex, serial fast communications controllers (FCCs) supporting ATM (155 Mbps)

protocol through UTOPIA2 interface (there are two UTOPIA interfaces on the MPC8280), IEEE

802.3 and Fast Ethernet protocols, HDLC up to E3 rates (45 Mbps) and totally transparent

operation. Each FCC can be configured to transmit fully transparent and receive HDLC or

vice-versa. (Note that the MPC8270 does not support ATM (155 Mbps) protocol.)

•

Two multichannel controllers (MCCs) that can handle an aggregate of 256 X 64 Kbps HDLC or

transparent channels, multiplexed on up to eight TDM interfaces. The MCC also supports

super-channels of rates higher than 64 Kbps and subchanneling of the 64-Kbps channels.

•

Four full-duplex serial communications controllers (SCCs) supporting IEEE802.3/Ethernet, high-

level synchronous data link control, HDLC, local talk, UART, synchronous UART, BISYNC, and

transparent.

•

Two full-duplex serial management controllers (SMC) supporting GCI, UART, and transparent

operations

•

Serial peripheral interface (SPI) and I2C bus controllers

•

Time-slot assigner (TSA) that supports multiplexing of data from any of the four SCCs, three

FCCs, and two SMCs.

1.3

Software Compatibility Issues

As much as possible, the MPC8280 CPM features were made similar to those of the previous MPC860

PowerQUICC family devices and the MPC8260 PowerQUICC II family devices. The code flow ports

easily from previous devices to the MPC8280, except for new protocols supported by the MPC8280.

Although many registers are new, most registers retain the old status and event bits, so an understanding

of the programming models of the MC68360, MPC860, or MPC85015 is helpful. Note that the MPC8280

initialization code requires changes from the MPC860 initialization code (Freescale provides reference

code).

1.3.1

Signals

Figure 1-2 shows MPC8280 signals grouped by function. Note that many of these signals are multiplexed

and this figure does not indicate how these signals are multiplexed.

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