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PIC18F4685-I/SP датащи(PDF) 138 Page - Microchip Technology

номер детали PIC18F4685-I/SP
подробное описание детали  28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology
PDF  484 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F4685-I/SP датащи(HTML) 138 Page - Microchip Technology

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PIC18F2682/2685/4682/4685
DS39761B-page 136
Preliminary
© 2007 Microchip Technology Inc.
TABLE 10-5:
PORTC I/O SUMMARY
Pin Name
Function
I/O
TRIS
Buffer
Description
RC0/T1OSO/
T13CKI
RC0
OUT
0
DIG
LATC<0> data output.
IN
1
ST
PORTC<0> data input.
T1OSO
OUT
x
ANA
Timer1 oscillator output – overrides the TRIS<0> control when enabled.
T13CKI
IN
1
ST
Timer1/Timer3 clock input.
RC1/T1OSI
RC1
OUT
0
DIG
LATC<1> data output.
IN
1
ST
PORTC<1> data input.
T1OSI
IN
x
ANA
Timer1 oscillator input – overrides the TRIS<1> control when enabled.
RC2/CCP1
RC2
OUT
0
DIG
LATC<2> data output.
IN
1
ST
PORTC<2> data input.
CCP1
OUT
0
DIG
CCP1 compare output.
IN
1
ST
CCP1 capture input.
RC3/SCK/SCL RC3
OUT
0
DIG
LATC<3> data output.
IN
1
ST
PORTC<3> data input.
SCK
OUT
0
DIG
SPI clock output (MSSP module) – must have TRIS set to ‘1’ to allow the
MSSP module to control the bidirectional communication.
IN
1
ST
SPI clock input (MSSP module).
SCL
OUT
0
DIG
I2C™/SMBus clock output (MSSP module) – must have TRIS set to ‘1’ to
allow the MSSP module to control the bidirectional communication.
IN
1
I2C/SMB I2C/SMBus clock input.
RC4/SDI/SDA
RC4
OUT
0
DIG
LATC<4> data output.
IN
1
ST
PORTC<4> data input.
SDI
IN
1
ST
SPI data input (MSSP module).
SDA
OUT
1
DIG
I2C/SMBus data output (MSSP module) – must have TRIS set to ‘1’ to
allow the MSSP module to control the bidirectional communication.
IN
1
I2C/SMB I2C/SMBus data input (MSSP module) – must have TRIS set to ‘1’ to allow
the MSSP module to control the bidirectional communication.
RC5/SDO
RC5
OUT
0
DIG
LATC<5> data output.
IN
1
ST
PORTC<5> data input.
SDO
OUT
0
DIG
SPI data output (MSSP module).
RC6/TX/CK
RC6
OUT
0
DIG
LATC<6> data output.
IN
1
ST
PORTC<6> data input.
TX
OUT
0
DIG
EUSART data output.
CK
OUT
1
DIG
EUSART synchronous clock output – must have TRIS set to ‘1’ to enable
EUSART to control the bidirectional communication.
IN
1
ST
EUSART synchronous clock input.
RC7/RX/DT
RC7
OUT
0
DIG
LATC<7> data output.
IN
1
ST
PORTC<7> data input.
RX
IN
1
ST
EUSART asynchronous data input.
DT
OUT
1
DIG
EUSART synchronous data output – must have TRIS set to ‘1’ to enable
EUSART to control the bidirectional communication.
IN
1
ST
EUSART synchronous data input.
Legend:
OUT = Output; IN = Input; ANA = Analog Signal; DIG = Digital Output; ST = Schmitt Buffer Input;
TTL = TTL Buffer Input; I2C = Inter-Integrated Circuit; SMBus = System Management Bus



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