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SC28L92 датащи(PDF) 35 Page - NXP Semiconductors

номер детали SC28L92
подробное описание детали  3.3V-5.0V Dual Universal Asynchronous Receiver/Transmitter DUART
PDF  44 Pages
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производитель  PHILIPS [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

SC28L92 датащи(HTML) 35 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
SC28L92
3.3V–5.0V Dual Universal Asynchronous
Receiver/Transmitter (DUART)
2000 Jan 21
35
thus, called RTSAN for RxA and RTSBN for RxB. RTSAN is on pin
OP0 and RTSBN is on OP1. A receiver’s RTS output will usually be
connected to the CTS input of the associated transmitter. Therefore,
one could say that RTS and CTS are different ends of the same
wire!
MR2(4) is the bit that allows the transmitter to be controlled by the
CTS pin (IP0 or IP1). When this bit is set to one AND the CTS input
is driven high, the transmitter will stop sending data at the end of the
present character being serialized. It is usually the RTS output of
the receiver that will be connected to the transmitter’s CTS input.
The receiver will set RTS high when the receiver FIFO is full AND
the start bit of the ninth or 17th character is sensed. Transmission
then stops with nine or 17 valid characters in the receiver. When
MR2(4) is set to one, CTSN must be at zero for the transmitter to
operate. If MR2(4) is set to zero, the IP pin will have no effect on
the operation of the transmitter. MR1(7) is the bit that allows the
receiver to control OP0. When OP0 (or OP1) is controlled by the
receiver, the meaning of that pin will be.
RESETN
tRES
SD00696
RESETN
tRES
80XXX Mode
68XXX Mode
Figure 4. Reset Timing
A0–A3
CEN
tAS
tCS
tCH
RDN
tRW
tRWD
D0–D7
(READ)
tDD
tDF
FLOAT
FLOAT
VALID
NOT
VALID
WDN
tRWD
VALID
D0–D7
(WRITE)
tDS
tDH
tAH
SD00087
Figure 5. Bus Timing (80XXX mode)



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