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SAF7113 датащи(PDF) 35 Page - NXP Semiconductors |
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SAF7113 датащи(HTML) 35 Page - NXP Semiconductors |
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35 / 80 page ![]() 2000 May 08 35 Philips Semiconductors Product specification 9-bit video input processor SAF7113H 9.1 Initialization of boundary scan circuit The TAP (Test Access Port) controller of an IC should be in the reset state (TEST_LOGIC_RESET) when the IC is in functional mode. This reset state also forces the instruction register into a functional instruction such as IDCODE or BYPASS. To solve the power-up reset, the standard specifies that the TAP controller will be forced asynchronously to the TEST_LOGIC_RESET state by setting the TRST pin LOW. 9.2 Device identification codes A device identification register is specified in “IEEE Std. 1149.1b-1994”. It is a 32-bit register which contains fields for the specification of the IC manufacturer, the IC part number and the IC version number. Its biggest advantage is the possibility to check for the correct ICs mounted after production and determination of the version number of ICs during field service. When the IDCODE instruction is loaded into the BST instruction register, the identification register will be connected between TDI and TDO of the IC. The identification register will load a component specific code during the CAPTURE_DATA_REGISTER state of the TAP controller and this code can subsequently be shifted out. At board level this code can be used to verify component manufacturer, type and version number. The device identification register contains 32 bits, numbered 31 to 0, where bit 31 is the most significant bit (nearest to TDI) and bit 0 is the least significant bit (nearest to TDO); see Fig.25. Fig.25 32 bits of identification code. handbook, full pagewidth MHB332 00000010101 0111000100010011 nnnn 4-bit version code 16-bit part number 11-bit manufacturer identification TDI TDO 31 MSB LSB 28 27 12 11 1 0 1 |
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