SAF7113 datasheet(71/80 Pages) PHILIPS

71 / 80 page

2000 May 08

Philips Semiconductors

Product speciﬁcation

9-bit video input processor

SAF7113H

15.2.26 SUBADDRESS 41H TO 57H

Table 61 LCR register 2 to 24 (41H to 57H); see Table 4

Note

1. The assignment of the upper and lower nibbles to the corresponding field depends on the setting of FOFF

(subaddress 5B, D7); see Table 62.

Table 62 Setting of FOFF

LCR REGISTER 2 TO 24 (41H TO 57H)

FRAMING CODE

D7 TO D4

D3 TO D0

DT3 TO DT0(1)

WST625

teletext EuroWST, CCST

27H

0000

CC625

European closed caption

001

0001

VPS

video programming service

9951H

0010

WSS

wide screen signalling bits

1E3C1FH

0011

WST525

US teletext (WST)

27H

0100

CC525

US closed caption (line 21)

001

0101

Test line

video component signal, VBI region

−

0110

Intercast

oversampled CVBS data

−

0111

General text teletext

programmable

1000

VITC625

VITC/EBU time codes (Europe)

programmable

1001

VITC/SMPTE time codes (USA)

programmable

1010

Reserved

reserved

−

1011

NABTS

US NABTS

−

1100

Japtext

MOJI (Japanese)

programmable (A7H)

1101

JFS

Japanese format switch (L20/22)

programmable

1110

Active video video component signal, active video

region (default)

−

1111

FOFF

D7 TO D4

D3 TO D0

ﬁeld 1

ﬁeld 2

ﬁeld 1

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