CYPAS211 datasheet(18/31 Pages) INFINEON

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Datasheet

002-37216 Rev. *B

2023-10-10

EZ-PD™ PAG2S-QZ integrated USB PD and secondary-side QR-ZVS

controller

Electrical specifications

4.3

Functional block specifications

Table 5

Functional block specifications

Parameter

Description

Min

Typ

Max

Unit

Details / conditions

Synchronous rectifier

VCPP1

Voltage doubler output voltage

with VBUS = 3.3 V–5.5 V

–

VCPP2

Voltage doubler output voltage

with VBUS = 5.5 V–30 V

911

TR_SR

Rise time (1 V to VOH – 1 V) of

sync-rectifier gate driver

output with CL = 3 nF, including

(with and without double

bypass mode)

–

TF_SR1

Fall time (VOH – 1 V to 1 V) of

sync-rectifier gate driver

output with CL = 3 nF (with

doubler mode)

TF_SR2

Fall time (VOH – 1 V to 1 V) of

sync-rectifier gate driver

output with CL = 3 nF (with

doubler bypass mode)

VTRIP_NSN_100

Negative sense trip voltage to

turn ON secondary switch

100

150

VTRIP_ZCD

Negative sense trip voltage to

turn OFF secondary switch

–8

–5

–3

VTRIP_ZCDF

Trip voltage to turn OFF

secondary switch through fast

ZCD

TD_ON

Turn on propagation delay

from SR_DRAIN at 100 mV to

SR_GDRV reaching 1 V

–40

IO_SRC_SNK

Output peak current (source

and sink)

–1

–

TR_SR1

Rise time (1 V to VOH – 1 V) of

sync-rectifier gate driver

output with CL = 3 nF, including

(with doubler mode)

––

TR_SR2

Rise time (1 V to VOH – 1 V) of

sync-rectifier gate driver

output with CL = 3 nF, including

(with doubler bypass mode)

––

PWM

FSW

Switching frequency

–

300

kHz

–

PWM_ON

Minimum controllable ON time 100

–

VOL_PTDR

Output LOW voltage at the

output of pulse-edge

transformer driver

(ISink = 8 mA)

––

0.5

VDDD = 3 V, Iol = 8 mA

GPIO

I_LU

Latch up current limits

-100

–

100

–

RPU

Pull-up resistor value

3.5

5.6

8.5

kΩ

RPD

Pull-down resistor value

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