Datasheet

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002-37216 Rev. *B

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2023-10-10

CYPAS211

EZ-PD™ PAG2S-QZ integrated USB PD and

secondary-side QR-ZVS controller

General description

EZ-PD™ PAG2S-QZ CYPAS211 is an integrated secondary-side PWM controller and USB Power Delivery (USB PD)

controller, PAG2S-QZ integrates secondary side synchronous rectifier (SR), pulse-width modulator (PWM) and

zero voltage switching (ZVS) control. PAG2S-QZ is targeted towards USB-C power adapters; it fits well into

high-efficiency AC-DC flyback designs with USB PD, Qualcomm Quick Charge, and other standard charging

protocols. PAG2S-QZ CYPAS211 also supports USB PD Extended Power Range (EPR) mode.

Applications

• USB-C chargers and adapters

• USB-C chargers and adapters with EPR

• Power adapters supporting both USB PD and legacy charging

Features

• Integrated secondary-side flyback controller and charging port controller

• Integrates secondary side synchronous rectifier (SR), PWM control with ZVS support

• Supports synchronous rectification in quasi-resonant (QR) or critical conduction mode (CrCM), valley switching,

discontinuous conduction mode (DCM), and continuous conduction mode (CCM) and supports switching

frequency up to 300 kHz

• Supports burst mode for light load operations

• SR driver works with both standard MOSFET and logic level MOSFET

• USB PD 3.1 compliant with EPR support of up to 28V VBUS

• Supports USB PD 2.0, PD 3.0 with Programmable Power Supply (PPS), QC5.0, QC4+, QC 4.0, QC 3.0, QC 2.0,

Samsung AFC, Apple Charging, and BC v1.2 charging protocols

• Integrates low-side current sense amplifier (LSCSA), 2x VBUS discharge FETs, and an NFET gate driver to drive

the load switch and VCONN FETs to support EMCA cables

• Configurable VBUS overvoltage protection (OVP), undervoltage protection (UVP), overcurrent protection (OCP),

short-circuit protection (SCP), and system overtemperature protection (OTP)

• Protects against accidental VBUS to CC short; electrostatic discharge (ESD) protection on CC, VBUS, and DP/DM

lines and overvoltage on DP/DM lines

• Integrates a 32-bit Cortex®-M0+ with 64-KB flash, 8-KB SRAM, and 64-KB ROM

• 32-pin QFN package with –40°C to +150°C junction temperature range