Datasheet

4

002-37216 Rev. *B

2023-10-10

EZ-PD™ PAG2S-QZ integrated USB PD and secondary-side QR-ZVS

controller

Application overview

1

Application overview

1.1

USB PD adapter – Secondary-side flyback control

Figure 1 shows a power adapter application diagram implementing a secondary-side controlled synchronous

flyback system. In this system, EZ-PD™ PAG2S-QZ modulates the pulse width of the primary MOSFET in voltage

control mode. PAG2S-QZ engages the internal error amplifier (EA) and a programmable ramp generator to

determine the pulse width of the PWM. This PWM signal is transferred from the secondary to the primary side

through a pulse edge transformer. In this topology, PAG2S-QZ integrates three key features: secondary-side PWM

control, charging protocol control, and fault protection. In the following example, EZ-PD™ PAG2P is used as the

primary controller with PAG2S-QZ.

Figure 1

USB PD adapter with secondary-side flyback control

EZ-PD™

PAG2P

CYPAP212

EMI

Filter

GND

HV

GD

CS

CC1

CC2

DP_GPIO3

DM_GPIO2

EZ-PD™ PAG2S

CYPAS211

Temperature

Sensor

GPIOs

VCC

CC_COMP

EA_OUT

FB

PULSEIN

SS

PWM_DRV

RT

BGND

CYPET121