RT3624LE datasheet(6/48 Pages) RICHTEK

6 / 48 page

RT3624LE

is a registered trademark of Richtek Technology Corporation

www.richtek.com

DS3624LE-00

April

2022

Operation

G-NAVPTM Control Mode

The RT3624LE adopts G-NAVPTM (Green Native AVP)

which is Richtek’s proprietary topology. It is derived

from current mode constant on-time control with finite

DC gain of error amplifier and DC offset cancellation.

The topology can achieve easy load-line design and

provide high DC accuracy and fast transient response.

When the sensed current signal reaches the sensed

voltage signal, the RT3624LE generates a PWM pulse

to achieve loop modulation. Figure 1 shows the basic

G-NAVPTM behavior waveforms. The COMP signal is

the sensed voltage that is inverted and amplified signal

of the output voltage while current loading increases.

The COMP rises due to output voltage droop. Then

rising COMP forces PWM turn-on earlier and closely.

While inductor current reaches loading current, COMP

enters another steady state of higher voltage and the

corresponding output voltage is in the steady state of

lower voltage. The load-line, output voltage drooping

which is proportional to loading current, is achieved.

Sensed Current Signal

COMP

VID

ΔIcc x RLL

Steady State

PWM

Load Transient

Loading Current

ΔIcc

VOUT

Figure 1. G-NAVPTM Behavior Waveform

SVID Interface/Control Logic/Configuration

Registers

SVID Interface receives or transmits SVID signal with

CPU. Control Logic executes command (Read/Write

registers, setVID, setPS) and sends related signals to

control VR. Configuration Registers include function

setting registers and CPU required registers.

IMON Filter

IMON Filter is used to average current signal by an

analog low-pass filter. It outputs IMONAVG to the MUX

of ADC for current reporting.

MUX and ADC

The MUX supports the inputs for SET1, SET2, SET3,

SET4, TSEN, TSENA, PSYS, IMONAVG, IMONAAVG

and IMON_AUXAVG. The ADC converts these analog

signals to digital codes for reporting or function

settings.

UVLO

The UVLO detects the VCC voltage. As VCC exceeds

threshold, controller issues POR = high and waits

VRON. After both POR and VRON are ready, then

controller is enabled.

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