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RT3624LE датащи(PDF) 33 Page - Richtek Technology Corporation

номер детали RT3624LE
подробное описание детали  Dual Channel PWM Controller for IMVP9.1 CPU Core Power Supply
PDF  48 Pages
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производитель  RICHTEK [Richtek Technology Corporation]
домашняя страница  http://www.richtek.com
Logo RICHTEK - Richtek Technology Corporation

RT3624LE датащи(HTML) 33 Page - Richtek Technology Corporation

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RT3624LE
Copyright © 2022 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation
DS3624LE-00
April
2022
www.richtek.com
33
A
Load
Inductor
current
ΔV1
D
ΔV3
Short-term voltage target
VID Target
Output Voltage
Inductor
current
Loading Current ΔIcc
Figure 8. Zero Load-line with AC-droop Control
Per Phase Current Sense
To achieve higher efficiency, the RT3624LE adopts
inductor DCR current sensing to get each phase
current signal, as illustrated in Figure 9. An external
low-pass filter RX1 and CX reconstruct the current
signal. The low-pass filter time constant RX1×CX
should match time constant
LX
DCR
of Inductance and
DCR. It’s necessary to fine tune RX1 and CX for
transient performance and current reporting. If RC
network time constant matches inductor time constant
LX
DCR
, an ideal load transient waveform can be designed.
If RC network time constant is larger than inductor time
constant
LX
DCR
, VGTUS waveform has a sluggish droop
during load transient. If RC network is smaller than
inductor time constant
LX
DCR
, VGTUS waveform sags to
create
an
undershooting
failing
to
meet
the
specification and mis-trigger over-current protections
(sum OCP). Figure 11 shows the output waveforms
according to the RC network time constant.
The RX1 is highly recommended as two 0603 size
resistors in series to enhance the Iout reporting
accuracy. CX is suggested to be 0.1
µF X7R/0603 for
low de-rating value at high frequency.
ICS,PERx=
VCSIN
680
Ω
=
ILx×DCR
680
Ω
RX2 is optional for preventing VCSIN from exceeding
current sense amplifier input range. The time constant
of (RX1//RX2) x CX should match
LX
DCR
.
ICS,PERx=
VCSIN
680Ω
=
ILx×DCR
680Ω
×
RX2
RX1+R
X2
The current signal ICS,PERx is mirrored for load-line
control/current reporting, current balance and zero
current. The mirrored current to IMON pin is one time of
ICS,PER. (IIMON=AMIRROR×ICS,PERx, AMIRROR=1)
The current sense lines must be routed as differential
pair from the inductor to the controller on the same
layer.
The AUX current sense is demonstrated in Figure 10.
In this design, the RCS is 1k
Ω and the mirror-gain is
1.25 (IIMON_AUX =AMIRROR×ICS_AUX, AMIRROR=1.25)



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