RT3624LE datasheet(37/48 Pages) RICHTEK

37 / 48 page

RT3624LE

is a registered trademark of Richtek Technology Corporation

DS3624LE-00

April

2022

www.richtek.com

Dynamic VID (DVID) Compensation

During DVID transition, an extra current is required to

charge output capacitors for increasing voltage. The

charging current approximates to the product of the

DVID slew rate and output capacitance. For droop

system, the extra charging current induces extra

voltage droop so that the output voltage cannot reach

the target within the specified time. The extra voltage

drop approximates to DVID Slew Rate x Output

Capacitance x RLL (RLL is the load-line slope,

Ω). This

phenomenon is called droop effect. How charging

current affects loop is illustrated in Figure 15. The

RT3624LE provides one DVID compensation function

as shown in Figure 16. An internal current IDVID_LIFT

sinks internally from

FB pin to generate DVID

compensation, IDVID_LIFT×REA1. IDVID_LIFT for fast DVID

can

set

from

SET3

PIN-SETTING

DVID_LIFT[1], 10

µA and 20µA. For different scale of

DVID

SR,

IDVID_LIFT

internally

adjusted.

Compensating magnitude can also be adjusted by

REA1. When DAC output reaches the target ( ALERT

issue timing), inductor current is still high and needs a

time to settle down to the DC loading current. In the

settling time, the falling down current keeps charging

output capacitor (The magnitude is related with

inductor,

capacitance

and

VID).

Thus,

DVID

compensation can be less than DVID Slew Rate x

Output Capacitance (Capacitance degeneration should

be considered). While output capacitance is so large

that DVID compensation cannot cover, adding a

resistor and capacitor from FB to GND also can provide

similar function. The ERROR AMP compensation

(resistance and capacitance network among VSEN, FB

and COMP) also affects DVID behavior. The final

setting should be based on actual measurement.

VSEN

Droop Effect

Charging

Current

for DVID

Inductor Current

VID

Figure 15. Droop Effect in VID Transition

VIN

Gate

Driver

RESR

CO2

CO1

Current

Sense

VID

IDVID_LIFT

REA1

REA2

TON

GEN/

Driver

Interface

PWM

CMP

DCR

Charging

Current

for DVID

Inductor Current

VID

DVID Compensation

Improved VSEN

Optional for extra large

output capacitance

Figure 16. DVID Compensation

RT3624LE датащи(PDF) 37 Page - Richtek Technology Corporation

RT3624LE датащи(HTML) 37 Page - Richtek Technology Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48

датащи скачать

ссылки URL