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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AD5100EVAL датащи(PDF) 16 Page - Analog Devices |
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AD5100EVAL датащи(HTML) 16 Page - Analog Devices |
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16 / 32 page  AD5100 Preliminary Technical Data Rev. PrJ | Page 16 of 32 programming such that a broken WDI connection or any unusual condition that makes WDI float will trigger the reset. Enabling or disabling floating WDI can be changed dynamically provided that the OTP fuse of such function is not programmed or the OTP overriden function is selected. The default Watchdog Timeout is 1500ms. User should refer to Table 6b if they want to program a different setting. Manual Reset Manual Reset MR is active low and it has an internal pull-up resistor to V3MON. MR can be driven from a CMOS logic signal. The MR and RESET timing diagrams are shown in Figure 14. MR has the highest priority in triggering the RESET over any other monitoring inputs. MR RESET < t MR_GLITCH t MR_DELAY t RS_HOLD* •Programmable t MR MR RESET < t MR_GLITCH t MR_DELAY t RS_HOLD* •Programmable t MR Figure 14. Manual Reset Timing Diagrams |
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