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TSI721 датащи(PDF) 23 Page - Renesas Technology Corp |
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TSI721 датащи(HTML) 23 Page - Renesas Technology Corp |
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23 / 67 page ![]() Tsi721 Datasheet 23 April 4, 2016 Integrated Device Technology 2.10 Power-up Signals Table 9: Power-Up Signals Name Pin Type Description CLKMOD I-PU Clock mode. When high, Tsi721 uses “PCIe common clocked mode.” When low, it uses “PCIe non-common clocked mode.” It is a static signal. CLKSEL[1:0] IO REFCLKP/REFCLKN clock frequency select; PCCLKP/PCCLKN clock frequency select when in PCIe non-common clock mode. • 0b11 = 125 MHz • 0b10 = 100 MHz • 0b01 = 156.25 MHz •Others = Reserved When a 100-MHz clock is used, S-RIO SerDes rates of 1.25/2.5/5 Gbaud are supported. When a 125/156.25-MHz clock is used, S-RIO SerDes rates of 1.25/2.5/3.125/5 Gbaud are supported. When either a 100/125/156.25-MHz clock is used, PCIe SerDes rates of 2.5/5 Gbaud are supported. These power-up signals are multiplexed with GPIO[12:11]. It is a static signal. I2C_DISABLE IO Disable I2C register loading after reset. When asserted, Tsi721 does not attempt to load register values from an EEPROM over the I2C bus. 0 = Enable boot load from EEPROM 1 = Disable boot load from EEPROM This power-up signal is multiplexed with GPIO[4]. It is a static signal. I2C_MA IO I2C multi-byte address mode. If I2C_DISABLE == 0 (that is, download registers from EEPROM) then: 0 = Tsi721 uses 1-byte addressing for EEPROM 1 = Tsi721 uses 2-byte addressing for EEPROM Else I2C_DISABLE == 1 (do not download from EEPROM) • 0 = Tsi721 is boot loaded by the PCIe root complex after reset • 1 = Tsi721 is boot loaded by an external I2C master after reset This power-up signal is multiplexed with GPIO[6]. It is a static signal. I2C_SA[3:0] IO I2C slave address. The values on these pins represent the values for the 7-bit address of the Tsi721 when acting as an I2C slave. These signals, in combination with the I2C_SEL signal, determine the address of the EEPROM to boot from (see I2C_SEL pin description). The values on these pins can be overridden after a reset by writing to the I2C Slave Configuration Register. These power-up signals are multiplexed with GPIO[3:0]. It is a static signal. |
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