TSI721 datasheet(32/67 Pages) RENESAS

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Tsi721 Datasheet

April 4, 2016

Integrated Device Technology

TRX-DJ-DD-CC

Maximum Rx inherent

deterministic timing error

N/A

0.30

Maximum Rx inherent deterministic

timing error for common Refclk Rx

architecture. See Note 2.

TRX-DJ-DD-DC

Maximum Rx inherent

deterministic timing error

N/A

0.24

Maximum Rx inherent deterministic

timing error for data clocked Rx

architecture. See Note 2.

TRX-EYE-MEDIAN

-to-MAX-JITTER

Maximum time delta

between median and

deviation from median

0.3

Not specified

Only specified for 2.5 Gbps

TRX-MIN-PULSE Minimum width pulse at

Not specified

0.6

Measured to account for worst Tj at

10-12 BER. See Figure 4-29 of PCI

Express Base Specification (Rev. 2.1)

VRX-MAX-MIN-RA

TIO

Minimum/Maximum pulse

voltage on consecutive UI

Not specified

Rx eye must simultaneously meet

VRX-EYE limits.

BWRX-PLL-HI

Maximum Rx PLL

bandwidth

MHz

Second order PLL jitter transfer

bounding function. See Note 3.

BWRX-PLL-LO-3D

Minimum Rx PLL BW for

3 dB peaking

1.5

MHz

Second order PLL jitter transfer

bounding function. See Note 3.

BWRX-PLL-LO-1D

Minimum Rx PLL BW for

1dB peaking

Not specified

MHz

Second order PLL jitter transfer

bounding function. See Note 3.

PKGRX-PLL1

Rx PLL peaking with

8Mhz minimum BW

Not specified

3.0

Second order PLL jitter transfer

bounding function. See Note 3.

PKGRX-PLL2

Rx PLL peaking with

5MHz minimum BW

Not specified

1.0

Second order PLL jitter transfer

bounding function. See Note 3.

RLRX-DIFF

Rx package plus Si

differential return loss

10 for

0.05-1.25

GHz

8 for

1.25-2.5

GHz

See Figure 4-39 of PCI Express Base

Specification (Rev. 2.1) and Note 4.

RLRX-CM

Common mode Rx return

loss

6 (min.)

See Figure 4-39 of PCI Express Base

Specification (Rev. 2.1) and Note 4.

ZRX-DC

Receiver DC common

mode impedance

DC impedance limits are needed to

guarantee Receiver detect. See Note 5.

ZRX-DIFF-DC

DC differential impedance

120

Not specified

For 5.0 Gbps covered under RLRX-DIFF

parameter. See Note 5.

VRX-CM-AC-P

Rx AC common mode

voltage

150

mVP

Measured at Rx pins into a pair of 50



termination into ground. See Note 6.

Table 18: PCIe Differential Receiver Specifications (Continued)

Symbol

Parameter

2.5 Gbps

5.0 Gbps

Unit

Notes

Min.

Max.

Min.

Max.

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