AM79C901AVCT datasheet(50/90 Pages) AMD

50 / 90 page

Am79C901A

PR ELI M IN AR Y

HPR16: HomePNA PHY Control Register (Register 16)

Table 26.

HPR16: HomePNA PHY Control Register (Register 16)

Note: Writes to bits 1 and 2 will affect speed and power on node only.

Bits

Name

Description

Read/

Write

Default

Value

(hex)

Remote Command

1 = Ignore Remote Commands

0 = Normal operation

R/W

14:13

Reserved

Reads will produce undefined results. Should be

written as 0.

R/W

SQE_TEST Disable

1 = Disables the SQE heartbeat which occurs after

each transmission.

0 = The heartbeat assertion occurs on the COL pin

approximately 1-5 µs after transmission and for a

duration of 1 µs.

R/W

Command Low Power

1 = Command low power

0 = Normal operation

R/W

Command High Power

1 = Command high power

0 = Normal operation

R/W

Command Low Speed

1 = Command low speed

0 = Normal operation

R/W

Command High Speed

1 = Command high speed

0 = Normal operation

R/W

Disable AID Negotiation

1 = Disable AID negotiation

0 = Normal operation

R/W

Clear PHY-Event Counter

1 = Clear PHY event counter

0 = Normal operation

**Self clearing after ~100 ns

R/W

Disable Squelch adaptation

1 = Disable Squelch adaptation

0 = Normal operation

R/W

Power Down

1 = Power down

0 = Normal operation

(This bit is controlled by the HPR0, bit 11)

Reserved

Reads will produce undefined results

High Speed

1 = Device is currently in High speed

0 = Device is currently in Low speed

R/W

High Power

1 = Device is currently in High power

0 = Device is currently in Low power

R/W

Reserved

Reads will produce undefined results

R/W

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