ADF7021

Preliminary Technical Data

Rev. PrI | Page 30 of 44

REGISTER 2—TRANSMIT MODULATION REGISTER

P6

0

0

0

0

.

.

1

.

.

.

.

.

.

.

.

.

.

.

.

.

.

.

1

P2

X

0

0

1

.

.

1

P1

X

0

1

0

.

.

1

POWER AMPLIFIER OUTPUT HIGH LEVEL

PA OFF

–16.0dBm

–16 + 0.45dBm

–16 + 0.90dBm

.

.

13dBm

D9

0

0

0

0

.

1

D3

0

0

0

0

.

1

...

...

...

...

...

...

...

D2

0

0

1

1

.

1

D1

0

1

0

1

.

1

FOR FSK MODE,

PLL MODE

.

Tx FREQUENCY DEVIATION

POWER AMPLIFIER

TxDATA

INVERT

PA BIAS

PA RAMP

MODULATION

SCHEME

ADDRESS

BITS

PE1

0

1

POWER AMPLIFIER

OFF

ON

PA2

0

0

1

1

PA1

0

1

0

1

PA BIAS

5µA

7µA

9µA

11µA

DI2

0

0

1

1

DI1

0

1

0

1

TxDATA INVERT

NORMAL

INVERT CLK

INVERT DATA

INV CLK AND DATA

S3

0

0

0

0

1

1

1

1

S2

0

0

1

1

0

0

1

1

MODULATION SCHEME

2FSK

GAUSSIAN 2FSK

3FSK

4FSK

OVERSAMPLED 2FSK

RAISED CONSINE FILTER 2FSK

RAISED CONSINE FILTER 3FSK

RAISED CONSINE FILTER 4FSK

S1

0

1

0

1

0

1

0

1

S3

0

0

0

0

1

1

1

1

S2

0

0

1

1

0

0

1

1

PA RAMP RATE

NO RAMP

256 CODES/BIT

128 CODES/BIT

64 CODES/BIT

32 CODES/BIT

16 CODES/BIT

8 CODES/BIT

4 CODES/BIT

S1

0

1

0

1

0

1

0

1

NRC1

0

1

NARROWBAND

RC

DEFAULT

EXTRA FILTERING

Figure 34.

Register 2—Transmit Modulation Register Comments

•

2FSK/3FSK/4FSK frequency deviation

Direct output:

16

2

[Hz]

PFD

ON

CY_DEVIATI

TX_FREQUEN

Deviation

Frequency

×

=

Divide-by-2 enabled:

16

2

5

.

0

[Hz]

PFD

ON

CY_DEVIATI

TX_FREQUEN

Deviation

Frequency

×

×

=

where: TX_FREQUENCY_DEVIATION is set by R2_DB[19:27] and PFD is the PFD frequency.

•

In the case of 4FSK, there are tones at ±3 times the frequency deviation and at ±1 times the deviation.

•

Oversampled 2FSK is sampled at 32 times the programmed data rate.

•

The PA ramps at the programmed rate (R2_DB[8:10]) until it reaches its programmed level (R2_DB[13:18]).

•

If the PA is enabled/disabled by the PA_Enable Bit (R2_DB7), it ramps up and down. If it is enabled/disabled by the Tx_Rx bit

(R0_DB27), it ramps up and turns hard off.